BIT 63 arch/x86/include/asm/amd_nb.h #define AMD_NB_GART BIT(0) BIT 64 arch/x86/include/asm/amd_nb.h #define AMD_NB_L3_INDEX_DISABLE BIT(1) BIT 65 arch/x86/include/asm/amd_nb.h #define AMD_NB_L3_PARTITIONING BIT(2) BIT 361 arch/x86/include/asm/elf.h ALIGN_VA_32 = BIT(0), BIT 362 arch/x86/include/asm/elf.h ALIGN_VA_64 = BIT(1), BIT 35 arch/x86/include/asm/pmc_atom.h #define BIT_LPC_CLOCK_RUN BIT(4) BIT 36 arch/x86/include/asm/pmc_atom.h #define BIT_SHARED_IRQ_GPSC BIT(5) BIT 37 arch/x86/include/asm/pmc_atom.h #define BIT_ORED_DEDICATED_IRQ_GPSS BIT(18) BIT 38 arch/x86/include/asm/pmc_atom.h #define BIT_ORED_DEDICATED_IRQ_GPSC BIT(19) BIT 39 arch/x86/include/asm/pmc_atom.h #define BIT_SHARED_IRQ_GPSS BIT(20) BIT 59 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F0_DMA BIT(0) BIT 60 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F1_PWM1 BIT(1) BIT 61 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F2_PWM2 BIT(2) BIT 62 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F3_HSUART1 BIT(3) BIT 63 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F4_HSUART2 BIT(4) BIT 64 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F5_SPI BIT(5) BIT 65 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F6_XXX BIT(6) BIT 66 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS1_F7_XXX BIT(7) BIT 67 arch/x86/include/asm/pmc_atom.h #define BIT_SCC_EMMC BIT(8) BIT 68 arch/x86/include/asm/pmc_atom.h #define BIT_SCC_SDIO BIT(9) BIT 69 arch/x86/include/asm/pmc_atom.h #define BIT_SCC_SDCARD BIT(10) BIT 70 arch/x86/include/asm/pmc_atom.h #define BIT_SCC_MIPI BIT(11) BIT 71 arch/x86/include/asm/pmc_atom.h #define BIT_HDA BIT(12) BIT 72 arch/x86/include/asm/pmc_atom.h #define BIT_LPE BIT(13) BIT 73 arch/x86/include/asm/pmc_atom.h #define BIT_OTG BIT(14) BIT 74 arch/x86/include/asm/pmc_atom.h #define BIT_USH BIT(15) BIT 75 arch/x86/include/asm/pmc_atom.h #define BIT_GBE BIT(16) BIT 76 arch/x86/include/asm/pmc_atom.h #define BIT_SATA BIT(17) BIT 77 arch/x86/include/asm/pmc_atom.h #define BIT_USB_EHCI BIT(18) BIT 78 arch/x86/include/asm/pmc_atom.h #define BIT_SEC BIT(19) BIT 79 arch/x86/include/asm/pmc_atom.h #define BIT_PCIE_PORT0 BIT(20) BIT 80 arch/x86/include/asm/pmc_atom.h #define BIT_PCIE_PORT1 BIT(21) BIT 81 arch/x86/include/asm/pmc_atom.h #define BIT_PCIE_PORT2 BIT(22) BIT 82 arch/x86/include/asm/pmc_atom.h #define BIT_PCIE_PORT3 BIT(23) BIT 83 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F0_DMA BIT(24) BIT 84 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F1_I2C1 BIT(25) BIT 85 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F2_I2C2 BIT(26) BIT 86 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F3_I2C3 BIT(27) BIT 87 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F4_I2C4 BIT(28) BIT 88 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F5_I2C5 BIT(29) BIT 89 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F6_I2C6 BIT(30) BIT 90 arch/x86/include/asm/pmc_atom.h #define BIT_LPSS2_F7_I2C7 BIT(31) BIT 93 arch/x86/include/asm/pmc_atom.h #define BIT_SMB BIT(0) BIT 94 arch/x86/include/asm/pmc_atom.h #define BIT_OTG_SS_PHY BIT(1) BIT 95 arch/x86/include/asm/pmc_atom.h #define BIT_USH_SS_PHY BIT(2) BIT 96 arch/x86/include/asm/pmc_atom.h #define BIT_DFX BIT(3) BIT 217 arch/x86/include/uapi/asm/kvm.h #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) BIT 218 arch/x86/include/uapi/asm/kvm.h #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) BIT 219 arch/x86/include/uapi/asm/kvm.h #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) BIT 21 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MSG_REQ_ACK BIT(0) BIT 23 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MSG_USE_LPM BIT(1) BIT 78 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO BIT(0) BIT 80 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_BURST BIT(1) BIT 82 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_SYNC_PULSE BIT(2) BIT 84 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_AUTO_VERT BIT(3) BIT 86 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_HSE BIT(4) BIT 88 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_HFP BIT(5) BIT 90 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_HBP BIT(6) BIT 92 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VIDEO_HSA BIT(7) BIT 94 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8) BIT 96 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_EOT_PACKET BIT(9) BIT 98 include/drm/drm_mipi_dsi.h #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) BIT 100 include/drm/drm_mipi_dsi.h #define MIPI_DSI_MODE_LPM BIT(11) BIT 800 include/linux/ata.h return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6); BIT 73 include/linux/basic_mmio_gpio.h #define BGPIOF_BIG_ENDIAN BIT(0) BIT 74 include/linux/basic_mmio_gpio.h #define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ BIT 75 include/linux/basic_mmio_gpio.h #define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ BIT 76 include/linux/basic_mmio_gpio.h #define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3) BIT 101 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_4706_PKG_OPTION BIT(0) /* 0: full-featured package 1: low-cost package */ BIT 102 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_4706_SFLASH_PRESENT BIT(1) /* 0: parallel, 1: serial flash is present */ BIT 103 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_4706_SFLASH_TYPE BIT(2) /* 0: 8b-p/ST-s flash, 1: 16b-p/Atmal-s flash */ BIT 104 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */ BIT 105 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */ BIT 106 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */ BIT 503 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */ BIT 504 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */ BIT 505 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_EXT_LNA BIT(2) /* 0 disable */ BIT 506 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_SPROM_GPIO13_15 BIT(3) /* sprom/gpio13-15 mux */ BIT 507 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_EXTPA_EN BIT(4) /* 0 ext pa disable, 1 ext pa enabled */ BIT 508 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_GPIOCLK_ON_SPROMCS BIT(5) /* set drive out GPIO_CLK on sprom_cs pin */ BIT 509 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_PCIE_MDIO_ON_SPROMCS BIT(6) /* use sprom_cs pin as PCIE mdio interface */ BIT 510 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5 BIT(7) /* aband extpa will be at gpio2/5 and sprom_dout */ BIT 511 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_OVR_PIPEAUXCLKEN BIT(8) /* override core control on pipe_AuxClkEnable */ BIT 512 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_OVR_PIPEAUXPWRDOWN BIT(9) /* override core control on pipe_AuxPowerDown */ BIT 513 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_PCIE_AUXCLKEN BIT(10) /* pcie_auxclkenable */ BIT 514 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_PCIE_PIPE_PLLDOWN BIT(11) /* pcie_pipe_pllpowerdown */ BIT 515 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_EXTPA_EN2 BIT(12) /* 0 ext pa disable, 1 ext pa enabled */ BIT 516 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at gpio4 */ BIT 517 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at gpio5 */ BIT 528 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_5357_EXTPA BIT(14) BIT 529 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_5357_ANT_MUX_2O3 BIT(15) BIT 530 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_5357_NFLASH BIT(16) BIT 531 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_5357_I2S_PINS_ENABLE BIT(18) BIT 532 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_CHIPCTL_5357_I2CSPI_PINS_ENABLE BIT(19) BIT 534 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LPLDO_PU BIT(0) BIT 535 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_PMU_SLEEP_DIS BIT(1) BIT 536 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_PMU_BG_PU BIT(2) BIT 537 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_CBUCK_LPOM_PU BIT(3) BIT 538 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_CBUCK_PFM_PU BIT(4) BIT 539 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_CLDO_PU BIT(5) BIT 540 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LPLDO2_LVM BIT(6) BIT 541 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_WL_PMU_PU BIT(7) BIT 542 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LNLDO_PU BIT(8) BIT 543 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LDO3P3_PU BIT(9) BIT 544 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_OTP_PU BIT(10) BIT 545 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_XTAL_PU BIT(11) BIT 546 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_WL_PWRSW_PU BIT(12) BIT 547 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LQ_AVAIL BIT(13) BIT 548 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_LOGIC_RET BIT(14) BIT 549 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_MEM_SLEEP BIT(15) BIT 550 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_MACPHY_RET BIT(16) BIT 551 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_WL_CORE_READY BIT(17) BIT 552 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_ILP_REQ BIT(18) BIT 553 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_ALP_AVAIL BIT(19) BIT 554 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_MISC_PWRSW_PU BIT(20) BIT 555 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_SYNTH_PWRSW_PU BIT(21) BIT 556 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_RX_PWRSW_PU BIT(22) BIT 557 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_RADIO_PU BIT(23) BIT 558 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_VCO_LDO_PU BIT(24) BIT 559 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_AFE_LDO_PU BIT(25) BIT 560 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_RX_LDO_PU BIT(26) BIT 561 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_TX_LDO_PU BIT(27) BIT 562 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_HT_AVAIL BIT(28) BIT 563 include/linux/bcma/bcma_driver_chipcommon.h #define BCMA_RES_4314_MACPHY_CLK_AVAIL BIT(29) BIT 166 include/linux/clk-private.h .mask = BIT(_width) - 1, \ BIT 25 include/linux/clk-provider.h #define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ BIT 26 include/linux/clk-provider.h #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ BIT 27 include/linux/clk-provider.h #define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */ BIT 28 include/linux/clk-provider.h #define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ BIT 29 include/linux/clk-provider.h #define CLK_IS_ROOT BIT(4) /* root clk, has no parent */ BIT 30 include/linux/clk-provider.h #define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */ BIT 31 include/linux/clk-provider.h #define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */ BIT 32 include/linux/clk-provider.h #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */ BIT 33 include/linux/clk-provider.h #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ BIT 289 include/linux/clk-provider.h #define CLK_GATE_SET_TO_DISABLE BIT(0) BIT 290 include/linux/clk-provider.h #define CLK_GATE_HIWORD_MASK BIT(1) BIT 347 include/linux/clk-provider.h #define CLK_DIVIDER_ONE_BASED BIT(0) BIT 348 include/linux/clk-provider.h #define CLK_DIVIDER_POWER_OF_TWO BIT(1) BIT 349 include/linux/clk-provider.h #define CLK_DIVIDER_ALLOW_ZERO BIT(2) BIT 350 include/linux/clk-provider.h #define CLK_DIVIDER_HIWORD_MASK BIT(3) BIT 351 include/linux/clk-provider.h #define CLK_DIVIDER_ROUND_CLOSEST BIT(4) BIT 352 include/linux/clk-provider.h #define CLK_DIVIDER_READ_ONLY BIT(5) BIT 396 include/linux/clk-provider.h #define CLK_MUX_INDEX_ONE BIT(0) BIT 397 include/linux/clk-provider.h #define CLK_MUX_INDEX_BIT BIT(1) BIT 398 include/linux/clk-provider.h #define CLK_MUX_HIWORD_MASK BIT(2) BIT 399 include/linux/clk-provider.h #define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */ BIT 43 include/linux/clk.h #define PRE_RATE_CHANGE BIT(0) BIT 44 include/linux/clk.h #define POST_RATE_CHANGE BIT(1) BIT 45 include/linux/clk.h #define ABORT_RATE_CHANGE BIT(2) BIT 128 include/linux/clk/at91_pmc.h #define AT91_PMC_H32MXDIV BIT(24) BIT 114 include/linux/edac.h #define DEV_FLAG_UNKNOWN BIT(DEV_UNKNOWN) BIT 115 include/linux/edac.h #define DEV_FLAG_X1 BIT(DEV_X1) BIT 116 include/linux/edac.h #define DEV_FLAG_X2 BIT(DEV_X2) BIT 117 include/linux/edac.h #define DEV_FLAG_X4 BIT(DEV_X4) BIT 118 include/linux/edac.h #define DEV_FLAG_X8 BIT(DEV_X8) BIT 119 include/linux/edac.h #define DEV_FLAG_X16 BIT(DEV_X16) BIT 120 include/linux/edac.h #define DEV_FLAG_X32 BIT(DEV_X32) BIT 121 include/linux/edac.h #define DEV_FLAG_X64 BIT(DEV_X64) BIT 223 include/linux/edac.h #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) BIT 224 include/linux/edac.h #define MEM_FLAG_RESERVED BIT(MEM_RESERVED) BIT 225 include/linux/edac.h #define MEM_FLAG_UNKNOWN BIT(MEM_UNKNOWN) BIT 226 include/linux/edac.h #define MEM_FLAG_FPM BIT(MEM_FPM) BIT 227 include/linux/edac.h #define MEM_FLAG_EDO BIT(MEM_EDO) BIT 228 include/linux/edac.h #define MEM_FLAG_BEDO BIT(MEM_BEDO) BIT 229 include/linux/edac.h #define MEM_FLAG_SDR BIT(MEM_SDR) BIT 230 include/linux/edac.h #define MEM_FLAG_RDR BIT(MEM_RDR) BIT 231 include/linux/edac.h #define MEM_FLAG_DDR BIT(MEM_DDR) BIT 232 include/linux/edac.h #define MEM_FLAG_RDDR BIT(MEM_RDDR) BIT 233 include/linux/edac.h #define MEM_FLAG_RMBS BIT(MEM_RMBS) BIT 234 include/linux/edac.h #define MEM_FLAG_DDR2 BIT(MEM_DDR2) BIT 235 include/linux/edac.h #define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) BIT 236 include/linux/edac.h #define MEM_FLAG_RDDR2 BIT(MEM_RDDR2) BIT 237 include/linux/edac.h #define MEM_FLAG_XDR BIT(MEM_XDR) BIT 238 include/linux/edac.h #define MEM_FLAG_DDR3 BIT(MEM_DDR3) BIT 239 include/linux/edac.h #define MEM_FLAG_RDDR3 BIT(MEM_RDDR3) BIT 267 include/linux/edac.h #define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN) BIT 268 include/linux/edac.h #define EDAC_FLAG_NONE BIT(EDAC_NONE) BIT 269 include/linux/edac.h #define EDAC_FLAG_PARITY BIT(EDAC_PARITY) BIT 270 include/linux/edac.h #define EDAC_FLAG_EC BIT(EDAC_EC) BIT 271 include/linux/edac.h #define EDAC_FLAG_SECDED BIT(EDAC_SECDED) BIT 272 include/linux/edac.h #define EDAC_FLAG_S2ECD2ED BIT(EDAC_S2ECD2ED) BIT 273 include/linux/edac.h #define EDAC_FLAG_S4ECD4ED BIT(EDAC_S4ECD4ED) BIT 274 include/linux/edac.h #define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED) BIT 275 include/linux/edac.h #define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED) BIT 303 include/linux/edac.h #define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG) BIT 304 include/linux/edac.h #define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC) BIT 305 include/linux/edac.h #define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC) BIT 306 include/linux/edac.h #define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE) BIT 307 include/linux/edac.h #define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG) BIT 308 include/linux/edac.h #define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC) BIT 309 include/linux/edac.h #define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC) BIT 310 include/linux/edac.h #define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE) BIT 428 include/linux/filter.h #define BPF_ANC BIT(15) BIT 19 include/linux/gpio/consumer.h #define GPIOD_FLAGS_BIT_DIR_SET BIT(0) BIT 20 include/linux/gpio/consumer.h #define GPIOD_FLAGS_BIT_DIR_OUT BIT(1) BIT 21 include/linux/gpio/consumer.h #define GPIOD_FLAGS_BIT_DIR_VAL BIT(2) BIT 20 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_NO_FIFO BIT(0) BIT 21 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) BIT 22 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) BIT 23 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) BIT 24 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) BIT 27 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) BIT 28 include/linux/i2c-omap.h #define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) BIT 30 include/linux/i2c/dm355evm_msp.h # define MSP_STATUS_BAD_OFFSET BIT(0) BIT 31 include/linux/i2c/dm355evm_msp.h # define MSP_STATUS_BAD_COMMAND BIT(1) BIT 32 include/linux/i2c/dm355evm_msp.h # define MSP_STATUS_POWER_ERROR BIT(2) BIT 33 include/linux/i2c/dm355evm_msp.h # define MSP_STATUS_RXBUF_OVERRUN BIT(3) BIT 35 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_DC5 BIT(0) BIT 36 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_TVP5154 BIT(2) BIT 37 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_IMAGER BIT(3) BIT 38 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_ETHERNET BIT(4) BIT 39 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_SYS BIT(5) BIT 40 include/linux/i2c/dm355evm_msp.h # define MSP_RESET_AIC33 BIT(7) BIT 45 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_SW6_1 BIT(0) BIT 46 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_SW6_2 BIT(1) BIT 47 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_SW6_3 BIT(2) BIT 48 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_SW6_4 BIT(3) BIT 49 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_J1 BIT(4) /* NTSC/PAL */ BIT 50 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH1_MSP_INT BIT(5) /* active low */ BIT 52 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH2_SW10 BIT(3) BIT 53 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH2_SW11 BIT(4) BIT 54 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH2_SW12 BIT(5) BIT 55 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH2_SW13 BIT(6) BIT 56 include/linux/i2c/dm355evm_msp.h # define MSP_SWITCH2_SW14 BIT(7) BIT 58 include/linux/i2c/dm355evm_msp.h # define MSP_SDMMC_0_WP BIT(1) BIT 59 include/linux/i2c/dm355evm_msp.h # define MSP_SDMMC_0_CD BIT(2) /* active low */ BIT 60 include/linux/i2c/dm355evm_msp.h # define MSP_SDMMC_1_WP BIT(3) BIT 61 include/linux/i2c/dm355evm_msp.h # define MSP_SDMMC_1_CD BIT(4) /* active low */ BIT 64 include/linux/i2c/dm355evm_msp.h # define MSP_VIDEO_IMAGER BIT(7) /* low == tvp5146 */ BIT 249 include/linux/i2c/twl.h #define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0) BIT 250 include/linux/i2c/twl.h #define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1) BIT 251 include/linux/i2c/twl.h #define TWL4030_SIH_CTRL_COR_MASK BIT(2) BIT 322 include/linux/i2c/twl.h #define I2C_SCL_CTRL_PU BIT(0) BIT 323 include/linux/i2c/twl.h #define I2C_SDA_CTRL_PU BIT(2) BIT 324 include/linux/i2c/twl.h #define SR_I2C_SCL_CTRL_PU BIT(4) BIT 325 include/linux/i2c/twl.h #define SR_I2C_SDA_CTRL_PU BIT(6) BIT 770 include/linux/i2c/twl.h #define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */ BIT 771 include/linux/i2c/twl.h #define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */ BIT 772 include/linux/i2c/twl.h #define TWL5031 BIT(2) /* twl5031 has different registers */ BIT 773 include/linux/i2c/twl.h #define TWL6030_CLASS BIT(3) /* TWL6030 class */ BIT 774 include/linux/i2c/twl.h #define TWL6032_SUBCLASS BIT(4) /* TWL6032 has changed registers */ BIT 775 include/linux/i2c/twl.h #define TWL4030_ALLOW_UNSUPPORTED BIT(5) /* Some voltages are possible BIT 792 include/linux/ieee80211.h #define WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT BIT(0) BIT 793 include/linux/ieee80211.h #define WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR BIT(1) BIT 794 include/linux/ieee80211.h #define WLAN_EID_CHAN_SWITCH_PARAM_REASON BIT(2) BIT 1162 include/linux/ieee80211.h #define IEEE80211_P2P_OPPPS_ENABLE_BIT BIT(7) BIT 2004 include/linux/ieee80211.h #define WLAN_EXT_CAPA4_INTERWORKING_ENABLED BIT(7) BIT 2010 include/linux/ieee80211.h #define WLAN_EXT_CAPA5_TDLS_ENABLED BIT(5) BIT 2011 include/linux/ieee80211.h #define WLAN_EXT_CAPA5_TDLS_PROHIBITED BIT(6) BIT 2013 include/linux/ieee80211.h #define WLAN_EXT_CAPA8_OPMODE_NOTIF BIT(6) BIT 2014 include/linux/ieee80211.h #define WLAN_EXT_CAPA8_TDLS_WIDE_BW_ENABLED BIT(7) BIT 136 include/linux/iio/adc/ad_sigma_delta.h .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT 137 include/linux/iio/adc/ad_sigma_delta.h BIT(IIO_CHAN_INFO_OFFSET), \ BIT 138 include/linux/iio/adc/ad_sigma_delta.h .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ BIT 50 include/linux/iio/common/st_sensors.h .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ BIT 258 include/linux/iio/iio.h return (chan->info_mask_separate & BIT(type)) | BIT 259 include/linux/iio/iio.h (chan->info_mask_shared_by_type & BIT(type)) | BIT 260 include/linux/iio/iio.h (chan->info_mask_shared_by_dir & BIT(type)) | BIT 261 include/linux/iio/iio.h (chan->info_mask_shared_by_all & BIT(type)); BIT 165 include/linux/iio/imu/adis.h .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT 166 include/linux/iio/imu/adis.h BIT(IIO_CHAN_INFO_SCALE), \ BIT 188 include/linux/iio/imu/adis.h .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT 189 include/linux/iio/imu/adis.h BIT(IIO_CHAN_INFO_SCALE) | \ BIT 190 include/linux/iio/imu/adis.h BIT(IIO_CHAN_INFO_OFFSET), \ BIT 206 include/linux/iio/imu/adis.h .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT 208 include/linux/iio/imu/adis.h .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ BIT 18 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_SPZZ BIT(31) BIT 19 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_EX_IN BIT(30) BIT 21 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_DMA_ENABLE BIT(15) BIT 25 include/linux/jz4740-adc.h #define JZ_ADC_CONFIG_BAT_MB BIT(4) BIT 90 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_PORNVBAT BIT(0) BIT 91 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1) BIT 92 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2) BIT 93 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_RTCALARM BIT(3) BIT 94 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_MAINCHDET BIT(4) BIT 95 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_VBUSDET BIT(5) BIT 96 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6) BIT 98 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0) BIT 99 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2) BIT 104 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0) BIT 105 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1) BIT 106 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2) BIT 107 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3) BIT 108 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4) BIT 109 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5) BIT 110 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6) BIT 111 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7) BIT 113 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL1_SWOFF BIT(0) BIT 114 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL1_SWRESET4500N BIT(1) BIT 115 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2) BIT 117 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0) BIT 118 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1) BIT 119 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2) BIT 120 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3) BIT 121 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4) BIT 122 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5) BIT 123 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6) BIT 124 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7) BIT 126 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0) BIT 127 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL3_RESETAUDN BIT(1) BIT 128 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL3_RESETDENCN BIT(2) BIT 129 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_STW4500CTRL3_THSDENA BIT(3) BIT 131 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0) BIT 132 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1) BIT 133 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4) BIT 138 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_LOWBAT_LOWBATENA BIT(0) BIT 154 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2) BIT 173 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2) BIT 174 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3) BIT 175 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4) BIT 176 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5) BIT 177 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6) BIT 178 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7) BIT 182 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2) BIT 183 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3) BIT 184 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4) BIT 185 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5) BIT 186 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6) BIT 187 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7) BIT 189 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0) BIT 190 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1) BIT 191 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKCTRL_USBCLKENA BIT(2) BIT 193 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0) BIT 194 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1) BIT 195 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2) BIT 201 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4) BIT 203 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2) BIT 204 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3) BIT 205 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4) BIT 207 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2) BIT 208 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3) BIT 209 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4) BIT 211 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2) BIT 212 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3) BIT 213 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4) BIT 215 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2) BIT 216 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3) BIT 217 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4) BIT 219 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2) BIT 220 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3) BIT 221 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4) BIT 223 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2) BIT 224 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3) BIT 225 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4) BIT 227 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2) BIT 228 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3) BIT 229 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4) BIT 231 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2) BIT 232 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3) BIT 233 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4) BIT 235 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0) BIT 236 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1) BIT 237 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2) BIT 238 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3) BIT 239 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4) BIT 240 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5) BIT 244 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SWATCTRL_UPDATERF BIT(0) BIT 245 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SWATCTRL_SWATENABLE BIT(1) BIT 248 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_SWATCTRL_SWATBIT5 BIT(6) BIT 250 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0) BIT 251 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1) BIT 252 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2) BIT 253 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3) BIT 254 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4) BIT 255 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5) BIT 256 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6) BIT 257 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7) BIT 259 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0) BIT 260 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1) BIT 261 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2) BIT 262 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3) BIT 263 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4) BIT 264 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5) BIT 265 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6) BIT 266 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7) BIT 268 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF1ENA BIT(0) BIT 269 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF2ENA BIT(1) BIT 270 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF3ENA BIT(2) BIT 271 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF4ENA BIT(3) BIT 273 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF1STRE BIT(4) BIT 274 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF2STRE BIT(5) BIT 275 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF3STRE BIT(6) BIT 276 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL_SYSCLK12BUF4STRE BIT(7) BIT 279 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_PLL26TO38ENA BIT(0) BIT 280 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_SYSCLK12USBMUXSEL BIT(1) BIT 281 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL0 BIT(2) BIT 282 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL1 BIT(3) BIT 283 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_SYSCLK12BUFMUX BIT(4) BIT 284 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_SYSCLK12PLLMUX BIT(5) BIT 285 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12CONFCTRL_SYSCLK2MUXVALID BIT(6) BIT 287 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL2_SYSCLK12BUF1PDENA BIT(0) BIT 288 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL2_SYSCLK12BUF2PDENA BIT(1) BIT 289 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL2_SYSCLK12BUF3PDENA BIT(2) BIT 290 include/linux/mfd/abx500/ab8500-sysctrl.h #define AB9540_SYSCLK12BUFCTRL2_SYSCLK12BUF4PDENA BIT(3) BIT 189 include/linux/mfd/as3722.h #define AS3722_LDO_ILIMIT_MASK BIT(7) BIT 190 include/linux/mfd/as3722.h #define AS3722_LDO_ILIMIT_BIT BIT(7) BIT 206 include/linux/mfd/as3722.h #define AS3722_LDO0_CTRL BIT(0) BIT 207 include/linux/mfd/as3722.h #define AS3722_LDO1_CTRL BIT(1) BIT 208 include/linux/mfd/as3722.h #define AS3722_LDO2_CTRL BIT(2) BIT 209 include/linux/mfd/as3722.h #define AS3722_LDO3_CTRL BIT(3) BIT 210 include/linux/mfd/as3722.h #define AS3722_LDO4_CTRL BIT(4) BIT 211 include/linux/mfd/as3722.h #define AS3722_LDO5_CTRL BIT(5) BIT 212 include/linux/mfd/as3722.h #define AS3722_LDO6_CTRL BIT(6) BIT 213 include/linux/mfd/as3722.h #define AS3722_LDO7_CTRL BIT(7) BIT 214 include/linux/mfd/as3722.h #define AS3722_LDO9_CTRL BIT(1) BIT 215 include/linux/mfd/as3722.h #define AS3722_LDO10_CTRL BIT(2) BIT 216 include/linux/mfd/as3722.h #define AS3722_LDO11_CTRL BIT(3) BIT 232 include/linux/mfd/as3722.h #define AS3722_SDn_CTRL(n) BIT(n) BIT 234 include/linux/mfd/as3722.h #define AS3722_SD0_MODE_FAST BIT(4) BIT 235 include/linux/mfd/as3722.h #define AS3722_SD1_MODE_FAST BIT(4) BIT 236 include/linux/mfd/as3722.h #define AS3722_SD2_MODE_FAST BIT(2) BIT 237 include/linux/mfd/as3722.h #define AS3722_SD3_MODE_FAST BIT(6) BIT 238 include/linux/mfd/as3722.h #define AS3722_SD4_MODE_FAST BIT(2) BIT 239 include/linux/mfd/as3722.h #define AS3722_SD5_MODE_FAST BIT(2) BIT 240 include/linux/mfd/as3722.h #define AS3722_SD6_MODE_FAST BIT(4) BIT 242 include/linux/mfd/as3722.h #define AS3722_POWER_OFF BIT(1) BIT 244 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_LID BIT(0) BIT 245 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_ACOK BIT(1) BIT 246 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_ENABLE1 BIT(2) BIT 247 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0 BIT(3) BIT 248 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_ONKEY_LONG BIT(4) BIT 249 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_ONKEY BIT(5) BIT 250 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_OVTMP BIT(6) BIT 251 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK1_LOWBAT BIT(7) BIT 253 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_SD0_LV BIT(0) BIT 254 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_SD1_LV BIT(1) BIT 255 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_SD2345_LV BIT(2) BIT 256 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_PWM1_OV_PROT BIT(3) BIT 257 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_PWM2_OV_PROT BIT(4) BIT 258 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_ENABLE2 BIT(5) BIT 259 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_SD6_LV BIT(6) BIT 260 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK2_RTC_REP BIT(7) BIT 262 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_RTC_ALARM BIT(0) BIT 263 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_GPIO1 BIT(1) BIT 264 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_GPIO2 BIT(2) BIT 265 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_GPIO3 BIT(3) BIT 266 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_GPIO4 BIT(4) BIT 267 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_GPIO5 BIT(5) BIT 268 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_WATCHDOG BIT(6) BIT 269 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK3_ENABLE3 BIT(7) BIT 271 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN BIT(0) BIT 272 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN BIT(1) BIT 273 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN BIT(2) BIT 274 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM BIT(3) BIT 275 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM BIT(4) BIT 276 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM BIT(5) BIT 277 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6 BIT(6) BIT 278 include/linux/mfd/as3722.h #define AS3722_INTERRUPT_MASK4_ADC BIT(7) BIT 280 include/linux/mfd/as3722.h #define AS3722_ADC1_INTERVAL_TIME BIT(0) BIT 281 include/linux/mfd/as3722.h #define AS3722_ADC1_INT_MODE_ON BIT(1) BIT 282 include/linux/mfd/as3722.h #define AS3722_ADC_BUF_ON BIT(2) BIT 283 include/linux/mfd/as3722.h #define AS3722_ADC1_LOW_VOLTAGE_RANGE BIT(5) BIT 284 include/linux/mfd/as3722.h #define AS3722_ADC1_INTEVAL_SCAN BIT(6) BIT 285 include/linux/mfd/as3722.h #define AS3722_ADC1_INT_MASK BIT(7) BIT 290 include/linux/mfd/as3722.h #define AS3722_ADC0_CONV_START BIT(7) BIT 291 include/linux/mfd/as3722.h #define AS3722_ADC0_CONV_NOTREADY BIT(7) BIT 294 include/linux/mfd/as3722.h #define AS3722_ADC1_CONV_START BIT(7) BIT 295 include/linux/mfd/as3722.h #define AS3722_ADC1_CONV_NOTREADY BIT(7) BIT 310 include/linux/mfd/as3722.h #define AS3722_GPIO_INV BIT(7) BIT 328 include/linux/mfd/as3722.h #define AS3722_GPIOn_SIGNAL(n) BIT(n) BIT 330 include/linux/mfd/as3722.h #define AS3722_I2C_PULL_UP BIT(4) BIT 331 include/linux/mfd/as3722.h #define AS3722_INT_PULL_UP BIT(5) BIT 333 include/linux/mfd/as3722.h #define AS3722_RTC_REP_WAKEUP_EN BIT(0) BIT 334 include/linux/mfd/as3722.h #define AS3722_RTC_ALARM_WAKEUP_EN BIT(1) BIT 335 include/linux/mfd/as3722.h #define AS3722_RTC_ON BIT(2) BIT 336 include/linux/mfd/as3722.h #define AS3722_RTC_IRQMODE BIT(3) BIT 337 include/linux/mfd/as3722.h #define AS3722_RTC_CLK32K_OUT_EN BIT(5) BIT 340 include/linux/mfd/as3722.h #define AS3722_WATCHDOG_ON BIT(0) BIT 341 include/linux/mfd/as3722.h #define AS3722_WATCHDOG_SW_SIG BIT(0) BIT 347 include/linux/mfd/as3722.h #define AS3722_FUSE7_SD0_LOW_VOLTAGE BIT(4) BIT 54 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RSTADC BIT(0) BIT 55 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RSTDAC BIT(1) BIT 56 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RD_BITS_8 BIT(4) BIT 57 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RD_UNSIGNED BIT(5) BIT 58 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_WD_BITS_8 BIT(6) BIT 59 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_WD_UNSIGNED BIT(7) BIT 60 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RFIFOEN BIT(8) BIT 61 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RFIFOCL BIT(9) BIT 62 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_RFIFOMD_WORD_1 BIT(10) BIT 63 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_WFIFOEN BIT(12) BIT 64 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_WFIFOCL BIT(13) BIT 65 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_CTRL_WFIFOMD_WORD_1 BIT(14) BIT 69 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_RDRDY_MASK BIT(0) BIT 70 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_RERROVF_MASK BIT(1) BIT 71 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_RERRUDR_MASK BIT(2) BIT 72 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_WDREQ_MASK BIT(3) BIT 73 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_WERROVF_MASKBIT BIT(4) BIT 74 include/linux/mfd/davinci_voicecodec.h #define DAVINCI_VC_INT_WERRUDR_MASK BIT(5) BIT 20 include/linux/mfd/db8500-prcmu.h #define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3) BIT 23 include/linux/mfd/db8500-prcmu.h #define DB8500_PRCM_DSI_SW_RESET_DSI0_SW_RESETN BIT(0) BIT 24 include/linux/mfd/db8500-prcmu.h #define DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN BIT(1) BIT 25 include/linux/mfd/db8500-prcmu.h #define DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN BIT(2) BIT 461 include/linux/mfd/db8500-prcmu.h #define PRCMU_AUTO_PM_POWER_ON_HSEM BIT(0) BIT 462 include/linux/mfd/db8500-prcmu.h #define PRCMU_AUTO_PM_POWER_ON_ABB_FIFO_IT BIT(1) BIT 35 include/linux/mfd/dbx500-prcmu.h #define PRCMU_WAKEUP(_name) (BIT(PRCMU_WAKEUP_INDEX_##_name)) BIT 105 include/linux/mfd/max14577-private.h #define MAX14577_INT1_ADC_MASK BIT(0) BIT 106 include/linux/mfd/max14577-private.h #define MAX14577_INT1_ADCLOW_MASK BIT(1) BIT 107 include/linux/mfd/max14577-private.h #define MAX14577_INT1_ADCERR_MASK BIT(2) BIT 108 include/linux/mfd/max14577-private.h #define MAX77836_INT1_ADC1K_MASK BIT(3) BIT 110 include/linux/mfd/max14577-private.h #define MAX14577_INT2_CHGTYP_MASK BIT(0) BIT 111 include/linux/mfd/max14577-private.h #define MAX14577_INT2_CHGDETRUN_MASK BIT(1) BIT 112 include/linux/mfd/max14577-private.h #define MAX14577_INT2_DCDTMR_MASK BIT(2) BIT 113 include/linux/mfd/max14577-private.h #define MAX14577_INT2_DBCHG_MASK BIT(3) BIT 114 include/linux/mfd/max14577-private.h #define MAX14577_INT2_VBVOLT_MASK BIT(4) BIT 115 include/linux/mfd/max14577-private.h #define MAX77836_INT2_VIDRM_MASK BIT(5) BIT 117 include/linux/mfd/max14577-private.h #define MAX14577_INT3_EOC_MASK BIT(0) BIT 118 include/linux/mfd/max14577-private.h #define MAX14577_INT3_CGMBC_MASK BIT(1) BIT 119 include/linux/mfd/max14577-private.h #define MAX14577_INT3_OVP_MASK BIT(2) BIT 120 include/linux/mfd/max14577-private.h #define MAX14577_INT3_MBCCHGERR_MASK BIT(3) BIT 134 include/linux/mfd/max14577-private.h #define STATUS1_ADCLOW_MASK BIT(STATUS1_ADCLOW_SHIFT) BIT 135 include/linux/mfd/max14577-private.h #define STATUS1_ADCERR_MASK BIT(STATUS1_ADCERR_SHIFT) BIT 136 include/linux/mfd/max14577-private.h #define MAX77836_STATUS1_ADC1K_MASK BIT(MAX77836_STATUS1_ADC1K_SHIFT) BIT 147 include/linux/mfd/max14577-private.h #define STATUS2_CHGDETRUN_MASK BIT(STATUS2_CHGDETRUN_SHIFT) BIT 148 include/linux/mfd/max14577-private.h #define STATUS2_DCDTMR_MASK BIT(STATUS2_DCDTMR_SHIFT) BIT 149 include/linux/mfd/max14577-private.h #define MAX14577_STATUS2_DBCHG_MASK BIT(MAX14577_STATUS2_DBCHG_SHIFT) BIT 150 include/linux/mfd/max14577-private.h #define MAX77836_STATUS2_DXOVP_MASK BIT(MAX77836_STATUS2_DXOVP_SHIFT) BIT 151 include/linux/mfd/max14577-private.h #define STATUS2_VBVOLT_MASK BIT(STATUS2_VBVOLT_SHIFT) BIT 152 include/linux/mfd/max14577-private.h #define MAX77836_STATUS2_VIDRM_MASK BIT(MAX77836_STATUS2_VIDRM_SHIFT) BIT 161 include/linux/mfd/max14577-private.h #define MICEN_MASK BIT(MICEN_SHIFT) BIT 162 include/linux/mfd/max14577-private.h #define IDBEN_MASK BIT(IDBEN_SHIFT) BIT 182 include/linux/mfd/max14577-private.h #define CTRL2_LOWPWR_MASK BIT(CTRL2_LOWPWR_SHIFT) BIT 183 include/linux/mfd/max14577-private.h #define CTRL2_ADCEN_MASK BIT(CTRL2_ADCEN_SHIFT) BIT 184 include/linux/mfd/max14577-private.h #define CTRL2_CPEN_MASK BIT(CTRL2_CPEN_SHIFT) BIT 185 include/linux/mfd/max14577-private.h #define CTRL2_SFOUTASRT_MASK BIT(CTRL2_SFOUTASRT_SHIFT) BIT 186 include/linux/mfd/max14577-private.h #define CTRL2_SFOUTORD_MASK BIT(CTRL2_SFOUTORD_SHIFT) BIT 187 include/linux/mfd/max14577-private.h #define CTRL2_ACCDET_MASK BIT(CTRL2_ACCDET_SHIFT) BIT 188 include/linux/mfd/max14577-private.h #define CTRL2_USBCPINT_MASK BIT(CTRL2_USBCPINT_SHIFT) BIT 189 include/linux/mfd/max14577-private.h #define CTRL2_RCPS_MASK BIT(CTRL2_RCPS_SHIFT) BIT 241 include/linux/mfd/max14577-private.h #define CDETCTRL1_CHGDETEN_MASK BIT(CDETCTRL1_CHGDETEN_SHIFT) BIT 242 include/linux/mfd/max14577-private.h #define CDETCTRL1_CHGTYPMAN_MASK BIT(CDETCTRL1_CHGTYPMAN_SHIFT) BIT 243 include/linux/mfd/max14577-private.h #define CDETCTRL1_DCDEN_MASK BIT(CDETCTRL1_DCDEN_SHIFT) BIT 244 include/linux/mfd/max14577-private.h #define CDETCTRL1_DCD2SCT_MASK BIT(CDETCTRL1_DCD2SCT_SHIFT) BIT 245 include/linux/mfd/max14577-private.h #define MAX14577_CDETCTRL1_DCHKTM_MASK BIT(MAX14577_CDETCTRL1_DCHKTM_SHIFT) BIT 246 include/linux/mfd/max14577-private.h #define MAX77836_CDETCTRL1_CDDLY_MASK BIT(MAX77836_CDETCTRL1_CDDLY_SHIFT) BIT 247 include/linux/mfd/max14577-private.h #define MAX14577_CDETCTRL1_DBEXIT_MASK BIT(MAX14577_CDETCTRL1_DBEXIT_SHIFT) BIT 248 include/linux/mfd/max14577-private.h #define MAX77836_CDETCTRL1_DCDCPL_MASK BIT(MAX77836_CDETCTRL1_DCDCPL_SHIFT) BIT 249 include/linux/mfd/max14577-private.h #define CDETCTRL1_DBIDLE_MASK BIT(CDETCTRL1_DBIDLE_SHIFT) BIT 250 include/linux/mfd/max14577-private.h #define CDETCTRL1_CDPDET_MASK BIT(CDETCTRL1_CDPDET_SHIFT) BIT 258 include/linux/mfd/max14577-private.h #define CHGCTRL2_MBCHOSTEN_MASK BIT(CHGCTRL2_MBCHOSTEN_SHIFT) BIT 260 include/linux/mfd/max14577-private.h #define CHGCTRL2_VCHGR_RC_MASK BIT(CHGCTRL2_VCHGR_RC_SHIFT) BIT 270 include/linux/mfd/max14577-private.h #define CHGCTRL4_MBCICHWRCL_MASK BIT(CHGCTRL4_MBCICHWRCL_SHIFT) BIT 278 include/linux/mfd/max14577-private.h #define CHGCTRL6_AUTOSTOP_MASK BIT(CHGCTRL6_AUTOSTOP_SHIFT) BIT 349 include/linux/mfd/max14577-private.h #define MAX77836_INTSRC_MASK_TOP_INT_MASK BIT(MAX77836_INTSRC_MASK_TOP_INT_SHIFT) BIT 350 include/linux/mfd/max14577-private.h #define MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK BIT(MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT) BIT 355 include/linux/mfd/max14577-private.h #define MAX77836_TOPSYS_INT_T120C_MASK BIT(MAX77836_TOPSYS_INT_T120C_SHIFT) BIT 356 include/linux/mfd/max14577-private.h #define MAX77836_TOPSYS_INT_T140C_MASK BIT(MAX77836_TOPSYS_INT_T140C_SHIFT) BIT 371 include/linux/mfd/max14577-private.h #define MAX77836_CNFG2_LDO_OVCLMPEN_MASK BIT(MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT) BIT 372 include/linux/mfd/max14577-private.h #define MAX77836_CNFG2_LDO_ALPMEN_MASK BIT(MAX77836_CNFG2_LDO_ALPMEN_SHIFT) BIT 374 include/linux/mfd/max14577-private.h #define MAX77836_CNFG2_LDO_POK_MASK BIT(MAX77836_CNFG2_LDO_POK_SHIFT) BIT 375 include/linux/mfd/max14577-private.h #define MAX77836_CNFG2_LDO_ADE_MASK BIT(MAX77836_CNFG2_LDO_ADE_SHIFT) BIT 376 include/linux/mfd/max14577-private.h #define MAX77836_CNFG2_LDO_SS_MASK BIT(MAX77836_CNFG2_LDO_SS_SHIFT) BIT 418 include/linux/mfd/max77686-private.h #define MAX77686_INT1_PWRONF_MSK BIT(0) BIT 419 include/linux/mfd/max77686-private.h #define MAX77686_INT1_PWRONR_MSK BIT(1) BIT 420 include/linux/mfd/max77686-private.h #define MAX77686_INT1_JIGONBF_MSK BIT(2) BIT 421 include/linux/mfd/max77686-private.h #define MAX77686_INT1_JIGONBR_MSK BIT(3) BIT 422 include/linux/mfd/max77686-private.h #define MAX77686_INT1_ACOKBF_MSK BIT(4) BIT 423 include/linux/mfd/max77686-private.h #define MAX77686_INT1_ACOKBR_MSK BIT(5) BIT 424 include/linux/mfd/max77686-private.h #define MAX77686_INT1_ONKEY1S_MSK BIT(6) BIT 425 include/linux/mfd/max77686-private.h #define MAX77686_INT1_MRSTB_MSK BIT(7) BIT 427 include/linux/mfd/max77686-private.h #define MAX77686_INT2_140C_MSK BIT(0) BIT 428 include/linux/mfd/max77686-private.h #define MAX77686_INT2_120C_MSK BIT(1) BIT 430 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_RTC60S_MSK BIT(0) BIT 431 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_RTCA1_MSK BIT(1) BIT 432 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_RTCA2_MSK BIT(2) BIT 433 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_SMPL_MSK BIT(3) BIT 434 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_RTC1S_MSK BIT(4) BIT 435 include/linux/mfd/max77686-private.h #define MAX77686_RTCINT_WTSR_MSK BIT(5) BIT 137 include/linux/mfd/max77693-private.h #define FLASH_STATUS_FLASH_ON BIT(3) BIT 138 include/linux/mfd/max77693-private.h #define FLASH_STATUS_TORCH_ON BIT(2) BIT 141 include/linux/mfd/max77693-private.h #define FLASH_INT_FLED2_OPEN BIT(0) BIT 142 include/linux/mfd/max77693-private.h #define FLASH_INT_FLED2_SHORT BIT(1) BIT 143 include/linux/mfd/max77693-private.h #define FLASH_INT_FLED1_OPEN BIT(2) BIT 144 include/linux/mfd/max77693-private.h #define FLASH_INT_FLED1_SHORT BIT(3) BIT 145 include/linux/mfd/max77693-private.h #define FLASH_INT_OVER_CURRENT BIT(4) BIT 333 include/linux/mfd/max77693-private.h #define SRC_IRQ_CHARGER BIT(0) BIT 334 include/linux/mfd/max77693-private.h #define SRC_IRQ_TOP BIT(1) BIT 335 include/linux/mfd/max77693-private.h #define SRC_IRQ_FLASH BIT(2) BIT 336 include/linux/mfd/max77693-private.h #define SRC_IRQ_MUIC BIT(3) BIT 340 include/linux/mfd/max77693-private.h #define LED_IRQ_FLED2_OPEN BIT(0) BIT 341 include/linux/mfd/max77693-private.h #define LED_IRQ_FLED2_SHORT BIT(1) BIT 342 include/linux/mfd/max77693-private.h #define LED_IRQ_FLED1_OPEN BIT(2) BIT 343 include/linux/mfd/max77693-private.h #define LED_IRQ_FLED1_SHORT BIT(3) BIT 344 include/linux/mfd/max77693-private.h #define LED_IRQ_MAX_FLASH BIT(4) BIT 346 include/linux/mfd/max77693-private.h #define TOPSYS_IRQ_T120C_INT BIT(0) BIT 347 include/linux/mfd/max77693-private.h #define TOPSYS_IRQ_T140C_INT BIT(1) BIT 348 include/linux/mfd/max77693-private.h #define TOPSYS_IRQ_LOWSYS_INT BIT(3) BIT 350 include/linux/mfd/max77693-private.h #define CHG_IRQ_BYP_I BIT(0) BIT 351 include/linux/mfd/max77693-private.h #define CHG_IRQ_THM_I BIT(2) BIT 352 include/linux/mfd/max77693-private.h #define CHG_IRQ_BAT_I BIT(3) BIT 353 include/linux/mfd/max77693-private.h #define CHG_IRQ_CHG_I BIT(4) BIT 354 include/linux/mfd/max77693-private.h #define CHG_IRQ_CHGIN_I BIT(6) BIT 356 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT1_ADC BIT(0) BIT 357 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT1_ADC_LOW BIT(1) BIT 358 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT1_ADC_ERR BIT(2) BIT 359 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT1_ADC1K BIT(3) BIT 361 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_CHGTYP BIT(0) BIT 362 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_CHGDETREUN BIT(1) BIT 363 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_DCDTMR BIT(2) BIT 364 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_DXOVP BIT(3) BIT 365 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_VBVOLT BIT(4) BIT 366 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT2_VIDRM BIT(5) BIT 368 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_EOC BIT(0) BIT 369 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_CGMBC BIT(1) BIT 370 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_OVP BIT(2) BIT 371 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_MBCCHG_ERR BIT(3) BIT 372 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_CHG_ENABLED BIT(4) BIT 373 include/linux/mfd/max77693-private.h #define MUIC_IRQ_INT3_BAT_DET BIT(5) BIT 48 include/linux/mfd/palmas.h #define PALMAS_PMIC_FEATURE_SMPS10_BOOST BIT(0) BIT 130 include/linux/mfd/rk808.h #define RK808_IRQ_VOUT_LO_MSK BIT(0) BIT 131 include/linux/mfd/rk808.h #define RK808_IRQ_VB_LO_MSK BIT(1) BIT 132 include/linux/mfd/rk808.h #define RK808_IRQ_PWRON_MSK BIT(2) BIT 133 include/linux/mfd/rk808.h #define RK808_IRQ_PWRON_LP_MSK BIT(3) BIT 134 include/linux/mfd/rk808.h #define RK808_IRQ_HOTDIE_MSK BIT(4) BIT 135 include/linux/mfd/rk808.h #define RK808_IRQ_RTC_ALARM_MSK BIT(5) BIT 136 include/linux/mfd/rk808.h #define RK808_IRQ_RTC_PERIOD_MSK BIT(6) BIT 137 include/linux/mfd/rk808.h #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0) BIT 138 include/linux/mfd/rk808.h #define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1) BIT 159 include/linux/mfd/rk808.h #define SWITCH2_EN BIT(6) BIT 160 include/linux/mfd/rk808.h #define SWITCH1_EN BIT(5) BIT 161 include/linux/mfd/rk808.h #define DEV_OFF_RST BIT(3) BIT 163 include/linux/mfd/rk808.h #define VB_LO_ACT BIT(4) BIT 166 include/linux/mfd/rk808.h #define VOUT_LO_INT BIT(0) BIT 167 include/linux/mfd/rk808.h #define CLK32KOUT2_EN BIT(0) BIT 203 include/linux/mfd/rn5t618.h #define RN5T618_REPCNT_REPWRON BIT(0) BIT 204 include/linux/mfd/rn5t618.h #define RN5T618_SLPCNT_SWPWROFF BIT(0) BIT 205 include/linux/mfd/rn5t618.h #define RN5T618_WATCHDOG_WDOGEN BIT(2) BIT 206 include/linux/mfd/rn5t618.h #define RN5T618_WATCHDOG_WDOGTIM_M (BIT(0) | BIT(1)) BIT 208 include/linux/mfd/rn5t618.h #define RN5T618_PWRIRQ_IR_WDOG BIT(6) BIT 250 include/linux/mfd/sta2x11-mfd.h #define SCTL_SCPLLCTL_AUDIO_PLL_PD BIT(1) BIT 251 include/linux/mfd/sta2x11-mfd.h #define SCTL_SCPLLCTL_FRAC_CONTROL BIT(3) BIT 252 include/linux/mfd/sta2x11-mfd.h #define SCTL_SCPLLCTL_STRB_BYPASS BIT(6) BIT 253 include/linux/mfd/sta2x11-mfd.h #define SCTL_SCPLLCTL_STRB_INPUT BIT(8) BIT 39 include/linux/mfd/syscon/exynos5-pmu.h #define EXYNOS5_PHY_ENABLE BIT(0) BIT 41 include/linux/mfd/syscon/exynos5-pmu.h #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) BIT 42 include/linux/mfd/syscon/exynos5-pmu.h #define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) BIT 72 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_MASK BIT(7) BIT 74 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_IOMUX BIT(7) BIT 75 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_MASK BIT(6) BIT 77 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_I2C3 BIT(6) BIT 78 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_MASK BIT(5) BIT 80 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_EPIT2 BIT(5) BIT 81 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_MASK BIT(4) BIT 83 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_I2C1 BIT(4) BIT 84 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_MASK BIT(3) BIT 86 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_I2C1 BIT(3) BIT 87 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_MASK BIT(2) BIT 89 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_I2C2 BIT(2) BIT 90 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_MASK BIT(1) BIT 92 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_I2C3 BIT(1) BIT 93 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_MASK BIT(0) BIT 95 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) BIT 98 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) BIT 99 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) BIT 100 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) BIT 101 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_MIPI_COLOR_SW BIT(25) BIT 102 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_DPI_OFF BIT(24) BIT 103 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) BIT 105 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) BIT 106 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ENET_CLK_SEL_MASK BIT(21) BIT 108 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ENET_CLK_SEL_ANATOP BIT(21) BIT 109 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_MIPI_IPU2_MUX_MASK BIT(20) BIT 111 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_MIPI_IPU2_MUX_IOMUX BIT(20) BIT 112 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_MIPI_IPU1_MUX_MASK BIT(19) BIT 114 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_MIPI_IPU1_MUX_IOMUX BIT(19) BIT 115 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_TEST_PD BIT(18) BIT 116 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_IPU_VPU_MUX_MASK BIT(17) BIT 118 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_IPU_VPU_MUX_IPU2 BIT(17) BIT 119 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_REF_CLK_EN BIT(16) BIT 120 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_USB_EXP_MODE BIT(15) BIT 121 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_PCIE_INT BIT(14) BIT 122 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_USB_OTG_ID_SEL_MASK BIT(13) BIT 124 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_USB_OTG_ID_SEL_GPIO_1 BIT(13) BIT 125 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_GINT BIT(12) BIT 130 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ACT_CS3 BIT(9) BIT 132 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ACT_CS2 BIT(6) BIT 134 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ACT_CS1 BIT(3) BIT 136 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR1_ACT_CS0 BIT(0) BIT 152 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BGREF_RRMODE_MASK BIT(15) BIT 154 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BGREF_RRMODE_INT_RESISTOR BIT(15) BIT 155 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DI1_VS_POLARITY_MASK BIT(10) BIT 157 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DI1_VS_POLARITY_ACTIVE_L BIT(10) BIT 158 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DI0_VS_POLARITY_MASK BIT(9) BIT 160 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DI0_VS_POLARITY_ACTIVE_L BIT(9) BIT 161 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BIT_MAPPING_CH1_MASK BIT(8) BIT 163 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BIT_MAPPING_CH1_JEIDA BIT(8) BIT 164 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DATA_WIDTH_CH1_MASK BIT(7) BIT 166 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DATA_WIDTH_CH1_24BIT BIT(7) BIT 167 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BIT_MAPPING_CH0_MASK BIT(6) BIT 169 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_BIT_MAPPING_CH0_JEIDA BIT(6) BIT 170 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DATA_WIDTH_CH0_MASK BIT(5) BIT 172 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_DATA_WIDTH_CH0_24BIT BIT(5) BIT 173 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR2_SPLIT_MODE_EN BIT(4) BIT 187 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_BCH_WR_CACHE_CTL BIT(28) BIT 188 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_BCH_RD_CACHE_CTL BIT(27) BIT 189 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_USDHCX_WR_CACHE_CTL BIT(26) BIT 190 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_USDHCX_RD_CACHE_CTL BIT(25) BIT 193 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_CORE3_DBG_ACK_EN BIT(16) BIT 194 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_CORE2_DBG_ACK_EN BIT(15) BIT 195 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_CORE1_DBG_ACK_EN BIT(14) BIT 196 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_CORE0_DBG_ACK_EN BIT(13) BIT 197 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_TZASC2_BOOT_LOCK BIT(12) BIT 198 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_TZASC1_BOOT_LOCK BIT(11) BIT 199 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR3_IPU_DIAG_MASK BIT(10) BIT 222 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VDOA_WR_CACHE_SEL BIT(31) BIT 223 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VDOA_RD_CACHE_SEL BIT(30) BIT 224 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VDOA_WR_CACHE_VAL BIT(29) BIT 225 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VDOA_RD_CACHE_VAL BIT(28) BIT 226 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_PCIE_WR_CACHE_SEL BIT(27) BIT 227 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_PCIE_RD_CACHE_SEL BIT(26) BIT 228 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_PCIE_WR_CACHE_VAL BIT(25) BIT 229 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_PCIE_RD_CACHE_VAL BIT(24) BIT 230 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_SDMA_STOP_ACK BIT(19) BIT 231 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_CAN2_STOP_ACK BIT(18) BIT 232 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_CAN1_STOP_ACK BIT(17) BIT 233 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_ENET_STOP_ACK BIT(16) BIT 236 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VPU_WR_CACHE_SEL BIT(7) BIT 237 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VPU_RD_CACHE_SEL BIT(6) BIT 238 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VPU_P_WR_CACHE_VAL BIT(3) BIT 239 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_VPU_P_RD_CACHE_VAL_MASK BIT(2) BIT 240 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_IPU_WR_CACHE_CTL BIT(1) BIT 241 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0) BIT 243 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) BIT 269 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR9_TZASC2_BYP BIT(1) BIT 270 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR9_TZASC1_BYP BIT(0) BIT 272 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_LOCK_DBG_EN BIT(29) BIT 273 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_LOCK_DBG_CLK_EN BIT(28) BIT 274 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_LOCK_SEC_ERR_RESP BIT(27) BIT 276 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_LOCK_OCRAM_TZ_EN BIT(20) BIT 279 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_DBG_EN BIT(13) BIT 280 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_DBG_CLK_EN BIT(12) BIT 281 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_SEC_ERR_RESP_MASK BIT(11) BIT 283 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_SEC_ERR_RESP_SLVE BIT(11) BIT 285 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR10_OCRAM_TZ_EN_MASK BIT(4) BIT 297 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR12_ARMP_IPG_CLK_EN BIT(27) BIT 298 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) BIT 299 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) BIT 300 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) BIT 302 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) BIT 305 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) BIT 306 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) BIT 307 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28) BIT 308 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_ENET_STOP_REQ BIT(27) BIT 330 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SATA_SPD_MODE_MASK BIT(15) BIT 332 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SATA_SPD_MODE_3P0G BIT(15) BIT 333 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SATA_MPLL_SS_EN BIT(14) BIT 391 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SATA_MPLL_CLK_EN BIT(1) BIT 392 include/linux/mfd/syscon/imx6q-iomuxc-gpr.h #define IMX6Q_GPR13_SATA_TX_EDGE_RATE BIT(0) BIT 44 include/linux/mfd/ti_am335x_tscadc.h #define IRQWKUP_ENB BIT(0) BIT 54 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_HW_PEN BIT(0) BIT 55 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO0THRES BIT(2) BIT 56 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO0OVRRUN BIT(3) BIT 57 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO0UNDRFLW BIT(4) BIT 58 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO1THRES BIT(5) BIT 59 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO1OVRRUN BIT(6) BIT 60 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_FIFO1UNDRFLW BIT(7) BIT 61 include/linux/mfd/ti_am335x_tscadc.h #define IRQENB_PENUP BIT(9) BIT 71 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_XPP BIT(5) BIT 72 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_XNN BIT(6) BIT 73 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_YPP BIT(7) BIT 74 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_YNN BIT(8) BIT 75 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_XNP BIT(9) BIT 76 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_YPN BIT(10) BIT 84 include/linux/mfd/ti_am335x_tscadc.h #define STEPCONFIG_FIFO1 BIT(26) BIT 113 include/linux/mfd/ti_am335x_tscadc.h #define CNTRLREG_TSCSSENB BIT(0) BIT 114 include/linux/mfd/ti_am335x_tscadc.h #define CNTRLREG_STEPID BIT(1) BIT 115 include/linux/mfd/ti_am335x_tscadc.h #define CNTRLREG_STEPCONFIGWRT BIT(2) BIT 116 include/linux/mfd/ti_am335x_tscadc.h #define CNTRLREG_POWERDOWN BIT(4) BIT 122 include/linux/mfd/ti_am335x_tscadc.h #define CNTRLREG_TSCENB BIT(7) BIT 129 include/linux/mfd/ti_am335x_tscadc.h #define SEQ_STATUS BIT(5) BIT 23 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_USB BIT(7) BIT 24 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_AC BIT(6) BIT 25 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_USB_PW_ENABLE BIT(5) BIT 26 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_AC_PW_ENABLE BIT(4) BIT 27 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_AC_CURRENT BIT(2) BIT 28 include/linux/mfd/tps6507x.h #define TPS6507X_CHG_USB_CURRENT BIT(0) BIT 31 include/linux/mfd/tps6507x.h #define TPS6507X_REG_MASK_AC_USB BIT(7) BIT 32 include/linux/mfd/tps6507x.h #define TPS6507X_REG_MASK_TSC BIT(6) BIT 33 include/linux/mfd/tps6507x.h #define TPS6507X_REG_MASK_PB_IN BIT(5) BIT 34 include/linux/mfd/tps6507x.h #define TPS6507X_REG_TSC_INT BIT(3) BIT 35 include/linux/mfd/tps6507x.h #define TPS6507X_REG_PB_IN_INT BIT(2) BIT 36 include/linux/mfd/tps6507x.h #define TPS6507X_REG_AC_USB_APPLIED BIT(1) BIT 37 include/linux/mfd/tps6507x.h #define TPS6507X_REG_AC_USB_REMOVED BIT(0) BIT 42 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC1_ENABLE BIT(4) BIT 43 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC2_ENABLE BIT(3) BIT 44 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC3_ENABLE BIT(2) BIT 45 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_LDO1_ENABLE BIT(1) BIT 46 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_LDO2_ENABLE BIT(0) BIT 53 include/linux/mfd/tps6507x.h #define TPS6507X_ADCONFIG_AD_ENABLE BIT(7) BIT 54 include/linux/mfd/tps6507x.h #define TPS6507X_ADCONFIG_START_CONVERSION BIT(6) BIT 55 include/linux/mfd/tps6507x.h #define TPS6507X_ADCONFIG_CONVERSION_DONE BIT(5) BIT 56 include/linux/mfd/tps6507x.h #define TPS6507X_ADCONFIG_VREF_ENABLE BIT(4) BIT 86 include/linux/mfd/tps6507x.h #define TPS6507X_REG_ADRESULT_2_MASK (BIT(1) | BIT(0)) BIT 93 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC1_ENABLE BIT(4) BIT 94 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC2_ENABLE BIT(3) BIT 95 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_DCDC3_ENABLE BIT(2) BIT 96 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_LDO1_ENABLE BIT(1) BIT 97 include/linux/mfd/tps6507x.h #define TPS6507X_CON_CTRL1_LDO2_ENABLE BIT(0) BIT 104 include/linux/mfd/tps6507x.h #define TPS6507X_DEFDCDC1_DCDC1_EXT_ADJ_EN BIT(7) BIT 145 include/linux/mfd/tps65090.h return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u); BIT 153 include/linux/mfd/tps65090.h return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u); BIT 69 include/linux/mfd/tps65217.h #define TPS65217_PPATH_ACSINK_ENABLE BIT(7) BIT 70 include/linux/mfd/tps65217.h #define TPS65217_PPATH_USBSINK_ENABLE BIT(6) BIT 71 include/linux/mfd/tps65217.h #define TPS65217_PPATH_AC_PW_ENABLE BIT(5) BIT 72 include/linux/mfd/tps65217.h #define TPS65217_PPATH_USB_PW_ENABLE BIT(4) BIT 76 include/linux/mfd/tps65217.h #define TPS65217_INT_PBM BIT(6) BIT 77 include/linux/mfd/tps65217.h #define TPS65217_INT_ACM BIT(5) BIT 78 include/linux/mfd/tps65217.h #define TPS65217_INT_USBM BIT(4) BIT 79 include/linux/mfd/tps65217.h #define TPS65217_INT_PBI BIT(2) BIT 80 include/linux/mfd/tps65217.h #define TPS65217_INT_ACI BIT(1) BIT 81 include/linux/mfd/tps65217.h #define TPS65217_INT_USBI BIT(0) BIT 83 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_TREG BIT(7) BIT 84 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_DPPM BIT(6) BIT 85 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_TSUSP BIT(5) BIT 86 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_TERMI BIT(4) BIT 87 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_ACTIVE BIT(3) BIT 88 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_CHGTOUT BIT(2) BIT 89 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_PCHGTOUT BIT(1) BIT 90 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG0_BATTEMP BIT(0) BIT 93 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_TMR_ENABLE BIT(5) BIT 94 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_NTC_TYPE BIT(4) BIT 95 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_RESET BIT(3) BIT 96 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_TERM BIT(2) BIT 97 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_SUSP BIT(1) BIT 98 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG1_CHG_EN BIT(0) BIT 100 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG2_DYNTMR BIT(7) BIT 101 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG2_VPREGHG BIT(6) BIT 106 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG2_PCHRGT BIT(3) BIT 108 include/linux/mfd/tps65217.h #define TPS65217_CHGCONFIG2_TRANGE BIT(0) BIT 110 include/linux/mfd/tps65217.h #define TPS65217_WLEDCTRL1_ISINK_ENABLE BIT(3) BIT 111 include/linux/mfd/tps65217.h #define TPS65217_WLEDCTRL1_ISEL BIT(2) BIT 118 include/linux/mfd/tps65217.h #define TPS65217_STATUS_OFF BIT(7) BIT 119 include/linux/mfd/tps65217.h #define TPS65217_STATUS_ACPWR BIT(3) BIT 120 include/linux/mfd/tps65217.h #define TPS65217_STATUS_USBPWR BIT(2) BIT 121 include/linux/mfd/tps65217.h #define TPS65217_STATUS_PB BIT(0) BIT 125 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_LDO3_PG BIT(6) BIT 126 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_LDO4_PG BIT(5) BIT 127 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_DC1_PG BIT(4) BIT 128 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_DC2_PG BIT(3) BIT 129 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_DC3_PG BIT(2) BIT 130 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_LDO1_PG BIT(1) BIT 131 include/linux/mfd/tps65217.h #define TPS65217_PGOOD_LDO2_PG BIT(0) BIT 133 include/linux/mfd/tps65217.h #define TPS65217_DEFPG_LDO1PGM BIT(3) BIT 134 include/linux/mfd/tps65217.h #define TPS65217_DEFPG_LDO2PGM BIT(2) BIT 137 include/linux/mfd/tps65217.h #define TPS65217_DEFDCDCX_XADJX BIT(7) BIT 140 include/linux/mfd/tps65217.h #define TPS65217_DEFSLEW_GO BIT(7) BIT 141 include/linux/mfd/tps65217.h #define TPS65217_DEFSLEW_GODSBL BIT(6) BIT 142 include/linux/mfd/tps65217.h #define TPS65217_DEFSLEW_PFM_EN1 BIT(5) BIT 143 include/linux/mfd/tps65217.h #define TPS65217_DEFSLEW_PFM_EN2 BIT(4) BIT 144 include/linux/mfd/tps65217.h #define TPS65217_DEFSLEW_PFM_EN3 BIT(3) BIT 149 include/linux/mfd/tps65217.h #define TPS65217_DEFLDO2_TRACK BIT(6) BIT 152 include/linux/mfd/tps65217.h #define TPS65217_DEFLDO3_LDO3_EN BIT(5) BIT 155 include/linux/mfd/tps65217.h #define TPS65217_DEFLDO4_LDO4_EN BIT(5) BIT 158 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_LS1_EN BIT(6) BIT 159 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_LS2_EN BIT(5) BIT 160 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_DC1_EN BIT(4) BIT 161 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_DC2_EN BIT(3) BIT 162 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_DC3_EN BIT(2) BIT 163 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_LDO1_EN BIT(1) BIT 164 include/linux/mfd/tps65217.h #define TPS65217_ENABLE_LDO2_EN BIT(0) BIT 166 include/linux/mfd/tps65217.h #define TPS65217_DEFUVLO_UVLOHYS BIT(2) BIT 187 include/linux/mfd/tps65217.h #define TPS65217_SEQ6_SEQUP BIT(2) BIT 188 include/linux/mfd/tps65217.h #define TPS65217_SEQ6_SEQDWN BIT(1) BIT 189 include/linux/mfd/tps65217.h #define TPS65217_SEQ6_INSTDWN BIT(0) BIT 66 include/linux/mfd/tps65218.h #define TPS65218_INT1_VPRG BIT(5) BIT 67 include/linux/mfd/tps65218.h #define TPS65218_INT1_AC BIT(4) BIT 68 include/linux/mfd/tps65218.h #define TPS65218_INT1_PB BIT(3) BIT 69 include/linux/mfd/tps65218.h #define TPS65218_INT1_HOT BIT(2) BIT 70 include/linux/mfd/tps65218.h #define TPS65218_INT1_CC_AQC BIT(1) BIT 71 include/linux/mfd/tps65218.h #define TPS65218_INT1_PRGC BIT(0) BIT 73 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS3_F BIT(5) BIT 74 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS2_F BIT(4) BIT 75 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS1_F BIT(3) BIT 76 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS3_I BIT(2) BIT 77 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS2_I BIT(1) BIT 78 include/linux/mfd/tps65218.h #define TPS65218_INT2_LS1_I BIT(0) BIT 80 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_VPRG BIT(5) BIT 81 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_AC BIT(4) BIT 82 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_PB BIT(3) BIT 83 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_HOT BIT(2) BIT 84 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_CC_AQC BIT(1) BIT 85 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK1_PRGC BIT(0) BIT 87 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS3_F BIT(5) BIT 88 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS2_F BIT(4) BIT 89 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS1_F BIT(3) BIT 90 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS3_I BIT(2) BIT 91 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS2_I BIT(1) BIT 92 include/linux/mfd/tps65218.h #define TPS65218_INT_MASK2_LS1_I BIT(0) BIT 94 include/linux/mfd/tps65218.h #define TPS65218_STATUS_FSEAL BIT(7) BIT 95 include/linux/mfd/tps65218.h #define TPS65218_STATUS_EE BIT(6) BIT 96 include/linux/mfd/tps65218.h #define TPS65218_STATUS_AC_STATE BIT(5) BIT 97 include/linux/mfd/tps65218.h #define TPS65218_STATUS_PB_STATE BIT(4) BIT 101 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_OFFNPFO BIT(1) BIT 102 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_CC_AQ BIT(0) BIT 104 include/linux/mfd/tps65218.h #define TPS65218_FLAG_GPO3_FLG BIT(7) BIT 105 include/linux/mfd/tps65218.h #define TPS65218_FLAG_GPO2_FLG BIT(6) BIT 106 include/linux/mfd/tps65218.h #define TPS65218_FLAG_GPO1_FLG BIT(5) BIT 107 include/linux/mfd/tps65218.h #define TPS65218_FLAG_LDO1_FLG BIT(4) BIT 108 include/linux/mfd/tps65218.h #define TPS65218_FLAG_DC4_FLG BIT(3) BIT 109 include/linux/mfd/tps65218.h #define TPS65218_FLAG_DC3_FLG BIT(2) BIT 110 include/linux/mfd/tps65218.h #define TPS65218_FLAG_DC2_FLG BIT(1) BIT 111 include/linux/mfd/tps65218.h #define TPS65218_FLAG_DC1_FLG BIT(0) BIT 113 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC6_EN BIT(5) BIT 114 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC5_EN BIT(4) BIT 115 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC4_EN BIT(3) BIT 116 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC3_EN BIT(2) BIT 117 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC2_EN BIT(1) BIT 118 include/linux/mfd/tps65218.h #define TPS65218_ENABLE1_DC1_EN BIT(0) BIT 120 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_GPIO3 BIT(6) BIT 121 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_GPIO2 BIT(5) BIT 122 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_GPIO1 BIT(4) BIT 123 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_LS3_EN BIT(3) BIT 124 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_LS2_EN BIT(2) BIT 125 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_LS1_EN BIT(1) BIT 126 include/linux/mfd/tps65218.h #define TPS65218_ENABLE2_LDO1_EN BIT(0) BIT 129 include/linux/mfd/tps65218.h #define TPS65218_CONFIG1_TRST BIT(7) BIT 130 include/linux/mfd/tps65218.h #define TPS65218_CONFIG1_GPO2_BUF BIT(6) BIT 131 include/linux/mfd/tps65218.h #define TPS65218_CONFIG1_IO1_SEL BIT(5) BIT 133 include/linux/mfd/tps65218.h #define TPS65218_CONFIG1_STRICT BIT(2) BIT 136 include/linux/mfd/tps65218.h #define TPS65218_CONFIG2_DC12_RST BIT(7) BIT 137 include/linux/mfd/tps65218.h #define TPS65218_CONFIG2_UVLOHYS BIT(6) BIT 141 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS3NPFO BIT(5) BIT 142 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS2NPFO BIT(4) BIT 143 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS1NPFO BIT(3) BIT 144 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS3DCHRG BIT(2) BIT 145 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS2DCHRG BIT(1) BIT 146 include/linux/mfd/tps65218.h #define TPS65218_CONFIG3_LS1DCHRG BIT(0) BIT 148 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_DCDC1_PFM BIT(7) BIT 151 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_DCDC2_PFM BIT(7) BIT 154 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_DCDC3_PFM BIT(7) BIT 157 include/linux/mfd/tps65218.h #define TPS65218_CONTROL_DCDC4_PFM BIT(7) BIT 160 include/linux/mfd/tps65218.h #define TPS65218_SLEW_RATE_GO BIT(7) BIT 161 include/linux/mfd/tps65218.h #define TPS65218_SLEW_RATE_GODSBL BIT(6) BIT 166 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY8 BIT(7) BIT 167 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY7 BIT(6) BIT 168 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY6 BIT(5) BIT 169 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY5 BIT(4) BIT 170 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY4 BIT(3) BIT 171 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY3 BIT(2) BIT 172 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY2 BIT(1) BIT 173 include/linux/mfd/tps65218.h #define TPS65218_SEQ1_DLY1 BIT(0) BIT 175 include/linux/mfd/tps65218.h #define TPS65218_SEQ2_DLYFCTR BIT(7) BIT 176 include/linux/mfd/tps65218.h #define TPS65218_SEQ2_DLY9 BIT(0) BIT 809 include/linux/mfd/tps65910.h #define TPS65910_GPIO_DEB BIT(2) BIT 810 include/linux/mfd/tps65910.h #define TPS65910_GPIO_PUEN BIT(3) BIT 811 include/linux/mfd/tps65910.h #define TPS65910_GPIO_CFG BIT(2) BIT 812 include/linux/mfd/tps65910.h #define TPS65910_GPIO_STS BIT(1) BIT 813 include/linux/mfd/tps65910.h #define TPS65910_GPIO_SET BIT(0) BIT 138 include/linux/mfd/wl1273-core.h #define WL1273_MODE_RX BIT(0) BIT 139 include/linux/mfd/wl1273-core.h #define WL1273_MODE_TX BIT(1) BIT 140 include/linux/mfd/wl1273-core.h #define WL1273_MODE_OFF BIT(2) BIT 141 include/linux/mfd/wl1273-core.h #define WL1273_MODE_SUSPENDED BIT(3) BIT 143 include/linux/mfd/wl1273-core.h #define WL1273_RADIO_CHILD BIT(0) BIT 144 include/linux/mfd/wl1273-core.h #define WL1273_CODEC_CHILD BIT(1) BIT 158 include/linux/mfd/wl1273-core.h #define WL1273_AUDIO_ENABLE_I2S BIT(0) BIT 159 include/linux/mfd/wl1273-core.h #define WL1273_AUDIO_ENABLE_ANALOG BIT(1) BIT 223 include/linux/mfd/wl1273-core.h #define WL1273_FR_EVENT BIT(0) BIT 224 include/linux/mfd/wl1273-core.h #define WL1273_BL_EVENT BIT(1) BIT 225 include/linux/mfd/wl1273-core.h #define WL1273_RDS_EVENT BIT(2) BIT 226 include/linux/mfd/wl1273-core.h #define WL1273_BBLK_EVENT BIT(3) BIT 227 include/linux/mfd/wl1273-core.h #define WL1273_LSYNC_EVENT BIT(4) BIT 228 include/linux/mfd/wl1273-core.h #define WL1273_LEV_EVENT BIT(5) BIT 229 include/linux/mfd/wl1273-core.h #define WL1273_IFFR_EVENT BIT(6) BIT 230 include/linux/mfd/wl1273-core.h #define WL1273_PI_EVENT BIT(7) BIT 231 include/linux/mfd/wl1273-core.h #define WL1273_PD_EVENT BIT(8) BIT 232 include/linux/mfd/wl1273-core.h #define WL1273_STIC_EVENT BIT(9) BIT 233 include/linux/mfd/wl1273-core.h #define WL1273_MAL_EVENT BIT(10) BIT 234 include/linux/mfd/wl1273-core.h #define WL1273_POW_ENB_EVENT BIT(11) BIT 235 include/linux/mfd/wl1273-core.h #define WL1273_SCAN_OVER_EVENT BIT(12) BIT 236 include/linux/mfd/wl1273-core.h #define WL1273_ERROR_EVENT BIT(13) BIT 119 include/linux/mmc/card.h #define MMC_DISCARD_FEATURE BIT(0) /* CMD38 feature */ BIT 211 include/linux/mmc/dw_mmc.h #define DW_MCI_QUIRK_IDMAC_DTO BIT(0) BIT 213 include/linux/mmc/dw_mmc.h #define DW_MCI_QUIRK_RETRY_DELAY BIT(1) BIT 215 include/linux/mmc/dw_mmc.h #define DW_MCI_QUIRK_HIGHSPEED BIT(2) BIT 217 include/linux/mmc/dw_mmc.h #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3) BIT 219 include/linux/mmc/dw_mmc.h #define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4) BIT 223 include/linux/mmc/dw_mmc.h #define DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT BIT(0) BIT 396 include/linux/mmc/mmc.h #define EXT_CSD_SEC_ER_EN BIT(0) BIT 397 include/linux/mmc/mmc.h #define EXT_CSD_SEC_BD_BLK_EN BIT(2) BIT 398 include/linux/mmc/mmc.h #define EXT_CSD_SEC_GB_CL_EN BIT(4) BIT 399 include/linux/mmc/mmc.h #define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */ BIT 414 include/linux/mmc/mmc.h #define EXT_CSD_PACKED_EVENT_EN BIT(3) BIT 419 include/linux/mmc/mmc.h #define EXT_CSD_URGENT_BKOPS BIT(0) BIT 420 include/linux/mmc/mmc.h #define EXT_CSD_DYNCAP_NEEDED BIT(1) BIT 421 include/linux/mmc/mmc.h #define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2) BIT 422 include/linux/mmc/mmc.h #define EXT_CSD_PACKED_FAILURE BIT(3) BIT 424 include/linux/mmc/mmc.h #define EXT_CSD_PACKED_GENERIC_ERROR BIT(0) BIT 425 include/linux/mmc/mmc.h #define EXT_CSD_PACKED_INDEXED_ERROR BIT(1) BIT 225 include/linux/mmzone.h #define LRU_ALL_FILE (BIT(LRU_INACTIVE_FILE) | BIT(LRU_ACTIVE_FILE)) BIT 226 include/linux/mmzone.h #define LRU_ALL_ANON (BIT(LRU_INACTIVE_ANON) | BIT(LRU_ACTIVE_ANON)) BIT 108 include/linux/omap-dma.h #define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0) BIT 109 include/linux/omap-dma.h #define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1) BIT 110 include/linux/omap-dma.h #define DMA_ERRATA_i378 BIT(0x2) BIT 111 include/linux/omap-dma.h #define DMA_ERRATA_i541 BIT(0x3) BIT 112 include/linux/omap-dma.h #define DMA_ERRATA_i88 BIT(0x4) BIT 113 include/linux/omap-dma.h #define DMA_ERRATA_3_3 BIT(0x5) BIT 114 include/linux/omap-dma.h #define DMA_ROMCODE_BUG BIT(0x6) BIT 117 include/linux/omap-dma.h #define DMA_LINKED_LCH BIT(0x0) BIT 118 include/linux/omap-dma.h #define GLOBAL_PRIORITY BIT(0x1) BIT 119 include/linux/omap-dma.h #define RESERVE_CHANNEL BIT(0x2) BIT 120 include/linux/omap-dma.h #define IS_CSSA_32 BIT(0x3) BIT 121 include/linux/omap-dma.h #define IS_CDSA_32 BIT(0x4) BIT 122 include/linux/omap-dma.h #define IS_RW_PRIORITY BIT(0x5) BIT 123 include/linux/omap-dma.h #define ENABLE_1510_MODE BIT(0x6) BIT 124 include/linux/omap-dma.h #define SRC_PORT BIT(0x7) BIT 125 include/linux/omap-dma.h #define DST_PORT BIT(0x8) BIT 126 include/linux/omap-dma.h #define SRC_INDEX BIT(0x9) BIT 127 include/linux/omap-dma.h #define DST_INDEX BIT(0xa) BIT 128 include/linux/omap-dma.h #define IS_BURST_ONLY4 BIT(0xb) BIT 129 include/linux/omap-dma.h #define CLEAR_CSR_ON_READ BIT(0xc) BIT 130 include/linux/omap-dma.h #define IS_WORD_16 BIT(0xd) BIT 131 include/linux/omap-dma.h #define ENABLE_16XX_MODE BIT(0xe) BIT 132 include/linux/omap-dma.h #define HS_CHANNELS_RESERVED BIT(0xf) BIT 133 include/linux/omap-dma.h #define DMA_ENGINE_HANDLE_IRQ BIT(0x10) BIT 51 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_PHY_PD BIT(0) BIT 53 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_AVALID BIT(0) BIT 54 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_BVALID BIT(1) BIT 55 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_VBUSVALID BIT(2) BIT 56 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_SESSEND BIT(3) BIT 57 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_DEV_IDDIG BIT(4) BIT 71 include/linux/phy/omap_control_phy.h #define OMAP_CTRL_USB2_PHY_PD BIT(28) BIT 73 include/linux/phy/omap_control_phy.h #define AM437X_CTRL_USB2_PHY_PD BIT(0) BIT 74 include/linux/phy/omap_control_phy.h #define AM437X_CTRL_USB2_OTG_PD BIT(1) BIT 75 include/linux/phy/omap_control_phy.h #define AM437X_CTRL_USB2_OTGVDET_EN BIT(19) BIT 76 include/linux/phy/omap_control_phy.h #define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20) BIT 57 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST41 BIT(10) BIT 58 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST40 BIT(9) BIT 59 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST39 BIT(8) BIT 60 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST27 BIT(7) BIT 61 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST26 BIT(6) BIT 62 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST25 BIT(5) BIT 63 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST24 BIT(4) BIT 64 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST23 BIT(3) BIT 65 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST22 BIT(2) BIT 66 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST21 BIT(1) BIT 67 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_ASYNCRSTR_ASRST20 BIT(0) BIT 78 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_SET_ASYNC_RESET BIT(0) BIT 79 include/linux/platform_data/dma-rcar-hpbdma.h #define HPB_DMAE_SET_ASYNC_MODE BIT(1) BIT 13 include/linux/platform_data/dma-s3c24xx.h #define S3C24XX_DMA_CHANREQ(src, chan) ((BIT(3) | src) << chan * 4) BIT 57 include/linux/platform_data/edma.h #define SAM BIT(0) BIT 58 include/linux/platform_data/edma.h #define DAM BIT(1) BIT 59 include/linux/platform_data/edma.h #define SYNCDIM BIT(2) BIT 60 include/linux/platform_data/edma.h #define STATIC BIT(3) BIT 62 include/linux/platform_data/edma.h #define TCCMODE BIT(11) BIT 64 include/linux/platform_data/edma.h #define TCINTEN BIT(20) BIT 65 include/linux/platform_data/edma.h #define ITCINTEN BIT(21) BIT 66 include/linux/platform_data/edma.h #define TCCHEN BIT(22) BIT 67 include/linux/platform_data/edma.h #define ITCCHEN BIT(23) BIT 44 include/linux/platform_data/lp855x.h #define LP8555_PWM_STANDBY BIT(7) BIT 45 include/linux/platform_data/lp855x.h #define LP8555_PWM_FILTER BIT(6) BIT 46 include/linux/platform_data/lp855x.h #define LP8555_RELOAD_EPROM BIT(3) /* use it if EPROMs should be reset BIT 48 include/linux/platform_data/lp855x.h #define LP8555_OFF_OPENLEDS BIT(2) BIT 60 include/linux/platform_data/lp855x.h #define LP8556_FAST_CONFIG BIT(7) /* use it if EPROMs should be maintained BIT 64 include/linux/platform_data/lp855x.h #define LP8557_PWM_STANDBY BIT(7) BIT 65 include/linux/platform_data/lp855x.h #define LP8557_PWM_FILTER BIT(6) BIT 66 include/linux/platform_data/lp855x.h #define LP8557_RELOAD_EPROM BIT(3) /* use it if EPROMs should be reset BIT 68 include/linux/platform_data/lp855x.h #define LP8557_OFF_OPENLEDS BIT(2) BIT 29 include/linux/platform_data/mmc-omap.h #define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0) BIT 30 include/linux/platform_data/mmc-omap.h #define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1) BIT 31 include/linux/platform_data/mmc-omap.h #define OMAP_HSMMC_SWAKEUP_MISSING BIT(2) BIT 20 include/linux/platform_data/mtd-davinci-aemif.h #define ACR_EW_MASK BIT(30) BIT 21 include/linux/platform_data/mtd-davinci-aemif.h #define ACR_SS_MASK BIT(31) BIT 68 include/linux/power/smartreflex.h #define SRCONFIG_SRENABLE BIT(11) BIT 69 include/linux/power/smartreflex.h #define SRCONFIG_SENENABLE BIT(10) BIT 70 include/linux/power/smartreflex.h #define SRCONFIG_ERRGEN_EN BIT(9) BIT 71 include/linux/power/smartreflex.h #define SRCONFIG_MINMAXAVG_EN BIT(8) BIT 72 include/linux/power/smartreflex.h #define SRCONFIG_DELAYCTRL BIT(2) BIT 93 include/linux/power/smartreflex.h #define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31) BIT 94 include/linux/power/smartreflex.h #define ERRCONFIG_VPBOUNDINTST_V1 BIT(30) BIT 95 include/linux/power/smartreflex.h #define ERRCONFIG_MCUACCUMINTEN BIT(29) BIT 96 include/linux/power/smartreflex.h #define ERRCONFIG_MCUACCUMINTST BIT(28) BIT 97 include/linux/power/smartreflex.h #define ERRCONFIG_MCUVALIDINTEN BIT(27) BIT 98 include/linux/power/smartreflex.h #define ERRCONFIG_MCUVALIDINTST BIT(26) BIT 99 include/linux/power/smartreflex.h #define ERRCONFIG_MCUBOUNDINTEN BIT(25) BIT 100 include/linux/power/smartreflex.h #define ERRCONFIG_MCUBOUNDINTST BIT(24) BIT 101 include/linux/power/smartreflex.h #define ERRCONFIG_MCUDISACKINTEN BIT(23) BIT 102 include/linux/power/smartreflex.h #define ERRCONFIG_VPBOUNDINTST_V2 BIT(23) BIT 103 include/linux/power/smartreflex.h #define ERRCONFIG_MCUDISACKINTST BIT(22) BIT 104 include/linux/power/smartreflex.h #define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22) BIT 112 include/linux/power/smartreflex.h #define IRQSTATUS_MCUACCUMINT BIT(3) BIT 113 include/linux/power/smartreflex.h #define IRQSTATUS_MCVALIDINT BIT(2) BIT 114 include/linux/power/smartreflex.h #define IRQSTATUS_MCBOUNDSINT BIT(1) BIT 115 include/linux/power/smartreflex.h #define IRQSTATUS_MCUDISABLEACKINT BIT(0) BIT 118 include/linux/power/smartreflex.h #define IRQENABLE_MCUACCUMINT BIT(3) BIT 119 include/linux/power/smartreflex.h #define IRQENABLE_MCUVALIDINT BIT(2) BIT 120 include/linux/power/smartreflex.h #define IRQENABLE_MCUBOUNDSINT BIT(1) BIT 121 include/linux/power/smartreflex.h #define IRQENABLE_MCUDISABLEACKINT BIT(0) BIT 67 include/linux/sh_clk.h #define CLK_ENABLE_ON_INIT BIT(0) BIT 69 include/linux/sh_clk.h #define CLK_ENABLE_REG_32BIT BIT(1) /* default access size */ BIT 70 include/linux/sh_clk.h #define CLK_ENABLE_REG_16BIT BIT(2) BIT 71 include/linux/sh_clk.h #define CLK_ENABLE_REG_8BIT BIT(3) BIT 73 include/linux/sh_clk.h #define CLK_MASK_DIV_ON_DISABLE BIT(4) BIT 47 include/linux/smsc911x.h #define SMSC911X_USE_16BIT (BIT(0)) BIT 48 include/linux/smsc911x.h #define SMSC911X_USE_32BIT (BIT(1)) BIT 49 include/linux/smsc911x.h #define SMSC911X_FORCE_INTERNAL_PHY (BIT(2)) BIT 50 include/linux/smsc911x.h #define SMSC911X_FORCE_EXTERNAL_PHY (BIT(3)) BIT 51 include/linux/smsc911x.h #define SMSC911X_SAVE_MAC_ADDRESS (BIT(4)) BIT 61 include/linux/smsc911x.h #define SMSC911X_SWAP_FIFO (BIT(5)) BIT 23 include/linux/soc/ti/knav_dma.h #define MASK(x) (BIT(x) - 1) BIT 26 include/linux/soc/ti/knav_dma.h #define KNAV_DMA_DESC_PS_INFO_IN_SOP BIT(22) BIT 33 include/linux/soc/ti/knav_dma.h #define KNAV_DMA_DESC_HAS_EPIB BIT(31) BIT 348 include/linux/spi/spi.h #define SPI_BPW_MASK(bits) BIT((bits) - 1) BIT 349 include/linux/spi/spi.h #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1)) BIT 358 include/linux/spi/spi.h #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ BIT 359 include/linux/spi/spi.h #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ BIT 360 include/linux/spi/spi.h #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ BIT 361 include/linux/spi/spi.h #define SPI_MASTER_MUST_RX BIT(3) /* requires rx */ BIT 362 include/linux/spi/spi.h #define SPI_MASTER_MUST_TX BIT(4) /* requires tx */ BIT 45 include/linux/sudmac.h #define SUDMAC_TX_BUFFER_MODE BIT(0) BIT 46 include/linux/sudmac.h #define SUDMAC_RX_END_MODE BIT(1) BIT 49 include/linux/sudmac.h #define SUDMAC_DMA_BIT_CH0 BIT(0) BIT 50 include/linux/sudmac.h #define SUDMAC_DMA_BIT_CH1 BIT(1) BIT 19 include/linux/usb/chipidea.h #define CI_HDRC_REGS_SHARED BIT(0) BIT 20 include/linux/usb/chipidea.h #define CI_HDRC_REQUIRE_TRANSCEIVER BIT(1) BIT 21 include/linux/usb/chipidea.h #define CI_HDRC_DISABLE_STREAMING BIT(3) BIT 26 include/linux/usb/chipidea.h #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4) BIT 27 include/linux/usb/chipidea.h #define CI_HDRC_IMX28_WRITE_FIX BIT(5) BIT 28 include/linux/usb/chipidea.h #define CI_HDRC_FORCE_FULLSPEED BIT(6) BIT 51 include/linux/usb/msm_hsusb_hw.h #define OTG_COMP_DISABLE BIT(0) BIT 11 include/linux/usb/quirks.h #define USB_QUIRK_STRING_FETCH_255 BIT(0) BIT 14 include/linux/usb/quirks.h #define USB_QUIRK_RESET_RESUME BIT(1) BIT 17 include/linux/usb/quirks.h #define USB_QUIRK_NO_SET_INTF BIT(2) BIT 20 include/linux/usb/quirks.h #define USB_QUIRK_CONFIG_INTF_STRINGS BIT(3) BIT 23 include/linux/usb/quirks.h #define USB_QUIRK_RESET BIT(4) BIT 27 include/linux/usb/quirks.h #define USB_QUIRK_HONOR_BNUMINTERFACES BIT(5) BIT 31 include/linux/usb/quirks.h #define USB_QUIRK_DELAY_INIT BIT(6) BIT 42 include/linux/usb/quirks.h #define USB_QUIRK_LINEAR_UFRAME_INTR_BINTERVAL BIT(7) BIT 45 include/linux/usb/quirks.h #define USB_QUIRK_DEVICE_QUALIFIER BIT(8) BIT 48 include/linux/usb/quirks.h #define USB_QUIRK_IGNORE_REMOTE_WAKEUP BIT(9) BIT 67 include/linux/wl12xx.h #define WL12XX_PLATFORM_QUIRK_EDGE_IRQ BIT(0) BIT 28 include/media/davinci/vpbe_venc.h #define VENC_END_OF_FRAME BIT(0) BIT 29 include/media/davinci/vpbe_venc.h #define VENC_FIRST_FIELD BIT(1) BIT 30 include/media/davinci/vpbe_venc.h #define VENC_SECOND_FIELD BIT(2) BIT 31 include/media/omap1_camera.h #define OMAP1_CAMERA_LCLK_RISING BIT(0) BIT 32 include/media/omap1_camera.h #define OMAP1_CAMERA_RST_LOW BIT(1) BIT 33 include/media/omap1_camera.h #define OMAP1_CAMERA_RST_HIGH BIT(2) BIT 329 include/media/soc_camera.h #define SOCAM_DATAWIDTH(x) BIT((x) - 1) BIT 202 include/net/bluetooth/hci.h #define HCI_PERSISTENT_MASK (BIT(HCI_LE_SCAN) | BIT(HCI_PERIODIC_INQ) | \ BIT 203 include/net/bluetooth/hci.h BIT(HCI_FAST_CONNECTABLE) | BIT(HCI_LE_ADV)) BIT 1286 include/net/bluetooth/hci_core.h #define DISCOV_TYPE_BREDR (BIT(BDADDR_BREDR)) BIT 1287 include/net/bluetooth/hci_core.h #define DISCOV_TYPE_LE (BIT(BDADDR_LE_PUBLIC) | \ BIT 1288 include/net/bluetooth/hci_core.h BIT(BDADDR_LE_RANDOM)) BIT 1289 include/net/bluetooth/hci_core.h #define DISCOV_TYPE_INTERLEAVED (BIT(BDADDR_BREDR) | \ BIT 1290 include/net/bluetooth/hci_core.h BIT(BDADDR_LE_PUBLIC) | \ BIT 1291 include/net/bluetooth/hci_core.h BIT(BDADDR_LE_RANDOM)) BIT 732 include/net/cfg80211.h STATION_PARAM_APPLY_UAPSD = BIT(0), BIT 733 include/net/cfg80211.h STATION_PARAM_APPLY_CAPABILITY = BIT(1), BIT 734 include/net/cfg80211.h STATION_PARAM_APPLY_PLINK_STATE = BIT(2), BIT 882 include/net/cfg80211.h STATION_INFO_INACTIVE_TIME = BIT(0), BIT 883 include/net/cfg80211.h STATION_INFO_RX_BYTES = BIT(1), BIT 884 include/net/cfg80211.h STATION_INFO_TX_BYTES = BIT(2), BIT 885 include/net/cfg80211.h STATION_INFO_LLID = BIT(3), BIT 886 include/net/cfg80211.h STATION_INFO_PLID = BIT(4), BIT 887 include/net/cfg80211.h STATION_INFO_PLINK_STATE = BIT(5), BIT 888 include/net/cfg80211.h STATION_INFO_SIGNAL = BIT(6), BIT 889 include/net/cfg80211.h STATION_INFO_TX_BITRATE = BIT(7), BIT 890 include/net/cfg80211.h STATION_INFO_RX_PACKETS = BIT(8), BIT 891 include/net/cfg80211.h STATION_INFO_TX_PACKETS = BIT(9), BIT 892 include/net/cfg80211.h STATION_INFO_TX_RETRIES = BIT(10), BIT 893 include/net/cfg80211.h STATION_INFO_TX_FAILED = BIT(11), BIT 894 include/net/cfg80211.h STATION_INFO_RX_DROP_MISC = BIT(12), BIT 895 include/net/cfg80211.h STATION_INFO_SIGNAL_AVG = BIT(13), BIT 896 include/net/cfg80211.h STATION_INFO_RX_BITRATE = BIT(14), BIT 897 include/net/cfg80211.h STATION_INFO_BSS_PARAM = BIT(15), BIT 898 include/net/cfg80211.h STATION_INFO_CONNECTED_TIME = BIT(16), BIT 899 include/net/cfg80211.h STATION_INFO_ASSOC_REQ_IES = BIT(17), BIT 900 include/net/cfg80211.h STATION_INFO_STA_FLAGS = BIT(18), BIT 901 include/net/cfg80211.h STATION_INFO_BEACON_LOSS_COUNT = BIT(19), BIT 902 include/net/cfg80211.h STATION_INFO_T_OFFSET = BIT(20), BIT 903 include/net/cfg80211.h STATION_INFO_LOCAL_PM = BIT(21), BIT 904 include/net/cfg80211.h STATION_INFO_PEER_PM = BIT(22), BIT 905 include/net/cfg80211.h STATION_INFO_NONPEER_PM = BIT(23), BIT 906 include/net/cfg80211.h STATION_INFO_RX_BYTES64 = BIT(24), BIT 907 include/net/cfg80211.h STATION_INFO_TX_BYTES64 = BIT(25), BIT 908 include/net/cfg80211.h STATION_INFO_CHAIN_SIGNAL = BIT(26), BIT 909 include/net/cfg80211.h STATION_INFO_CHAIN_SIGNAL_AVG = BIT(27), BIT 910 include/net/cfg80211.h STATION_INFO_EXPECTED_THROUGHPUT = BIT(28), BIT 929 include/net/cfg80211.h RATE_INFO_FLAGS_MCS = BIT(0), BIT 930 include/net/cfg80211.h RATE_INFO_FLAGS_VHT_MCS = BIT(1), BIT 931 include/net/cfg80211.h RATE_INFO_FLAGS_40_MHZ_WIDTH = BIT(2), BIT 932 include/net/cfg80211.h RATE_INFO_FLAGS_80_MHZ_WIDTH = BIT(3), BIT 933 include/net/cfg80211.h RATE_INFO_FLAGS_80P80_MHZ_WIDTH = BIT(4), BIT 934 include/net/cfg80211.h RATE_INFO_FLAGS_160_MHZ_WIDTH = BIT(5), BIT 935 include/net/cfg80211.h RATE_INFO_FLAGS_SHORT_GI = BIT(6), BIT 936 include/net/cfg80211.h RATE_INFO_FLAGS_60G = BIT(7), BIT 1130 include/net/cfg80211.h MPATH_INFO_FRAME_QLEN = BIT(0), BIT 1131 include/net/cfg80211.h MPATH_INFO_SN = BIT(1), BIT 1132 include/net/cfg80211.h MPATH_INFO_METRIC = BIT(2), BIT 1133 include/net/cfg80211.h MPATH_INFO_EXPTIME = BIT(3), BIT 1134 include/net/cfg80211.h MPATH_INFO_DISCOVERY_TIMEOUT = BIT(4), BIT 1135 include/net/cfg80211.h MPATH_INFO_DISCOVERY_RETRIES = BIT(5), BIT 1136 include/net/cfg80211.h MPATH_INFO_FLAGS = BIT(6), BIT 1616 include/net/cfg80211.h ASSOC_REQ_DISABLE_HT = BIT(0), BIT 1617 include/net/cfg80211.h ASSOC_REQ_DISABLE_VHT = BIT(1), BIT 1618 include/net/cfg80211.h ASSOC_REQ_USE_RRM = BIT(2), BIT 2632 include/net/cfg80211.h WIPHY_FLAG_SUPPORTS_WMM_ADMISSION = BIT(0), BIT 2635 include/net/cfg80211.h WIPHY_FLAG_NETNS_OK = BIT(3), BIT 2636 include/net/cfg80211.h WIPHY_FLAG_PS_ON_BY_DEFAULT = BIT(4), BIT 2637 include/net/cfg80211.h WIPHY_FLAG_4ADDR_AP = BIT(5), BIT 2638 include/net/cfg80211.h WIPHY_FLAG_4ADDR_STATION = BIT(6), BIT 2639 include/net/cfg80211.h WIPHY_FLAG_CONTROL_PORT_PROTOCOL = BIT(7), BIT 2640 include/net/cfg80211.h WIPHY_FLAG_IBSS_RSN = BIT(8), BIT 2641 include/net/cfg80211.h WIPHY_FLAG_MESH_AUTH = BIT(10), BIT 2642 include/net/cfg80211.h WIPHY_FLAG_SUPPORTS_SCHED_SCAN = BIT(11), BIT 2644 include/net/cfg80211.h WIPHY_FLAG_SUPPORTS_FW_ROAM = BIT(13), BIT 2645 include/net/cfg80211.h WIPHY_FLAG_AP_UAPSD = BIT(14), BIT 2646 include/net/cfg80211.h WIPHY_FLAG_SUPPORTS_TDLS = BIT(15), BIT 2647 include/net/cfg80211.h WIPHY_FLAG_TDLS_EXTERNAL_SETUP = BIT(16), BIT 2648 include/net/cfg80211.h WIPHY_FLAG_HAVE_AP_SME = BIT(17), BIT 2649 include/net/cfg80211.h WIPHY_FLAG_REPORTS_OBSS = BIT(18), BIT 2650 include/net/cfg80211.h WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD = BIT(19), BIT 2651 include/net/cfg80211.h WIPHY_FLAG_OFFCHAN_TX = BIT(20), BIT 2652 include/net/cfg80211.h WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL = BIT(21), BIT 2653 include/net/cfg80211.h WIPHY_FLAG_SUPPORTS_5_10_MHZ = BIT(22), BIT 2654 include/net/cfg80211.h WIPHY_FLAG_HAS_CHANNEL_SWITCH = BIT(23), BIT 2760 include/net/cfg80211.h WIPHY_WOWLAN_ANY = BIT(0), BIT 2761 include/net/cfg80211.h WIPHY_WOWLAN_MAGIC_PKT = BIT(1), BIT 2762 include/net/cfg80211.h WIPHY_WOWLAN_DISCONNECT = BIT(2), BIT 2763 include/net/cfg80211.h WIPHY_WOWLAN_SUPPORTS_GTK_REKEY = BIT(3), BIT 2764 include/net/cfg80211.h WIPHY_WOWLAN_GTK_REKEY_FAILURE = BIT(4), BIT 2765 include/net/cfg80211.h WIPHY_WOWLAN_EAP_IDENTITY_REQ = BIT(5), BIT 2766 include/net/cfg80211.h WIPHY_WOWLAN_4WAY_HANDSHAKE = BIT(6), BIT 2767 include/net/cfg80211.h WIPHY_WOWLAN_RFKILL_RELEASE = BIT(7), BIT 2824 include/net/cfg80211.h WIPHY_VENDOR_CMD_NEED_WDEV = BIT(0), BIT 2825 include/net/cfg80211.h WIPHY_VENDOR_CMD_NEED_NETDEV = BIT(1), BIT 2826 include/net/cfg80211.h WIPHY_VENDOR_CMD_NEED_RUNNING = BIT(2), BIT 27 include/net/inet_frag.h INET_FRAG_FIRST_IN = BIT(0), BIT 28 include/net/inet_frag.h INET_FRAG_LAST_IN = BIT(1), BIT 29 include/net/inet_frag.h INET_FRAG_COMPLETE = BIT(2), BIT 30 include/net/inet_frag.h INET_FRAG_EVICTED = BIT(3) BIT 42 include/net/ip.h #define IPSKB_FORWARDED BIT(0) BIT 43 include/net/ip.h #define IPSKB_XFRM_TUNNEL_SIZE BIT(1) BIT 44 include/net/ip.h #define IPSKB_XFRM_TRANSFORMED BIT(2) BIT 45 include/net/ip.h #define IPSKB_FRAG_COMPLETE BIT(3) BIT 46 include/net/ip.h #define IPSKB_REROUTED BIT(4) BIT 47 include/net/ip.h #define IPSKB_DOREDIRECT BIT(5) BIT 97 include/net/mac80211.h IEEE80211_MAX_QUEUE_MAP = BIT(IEEE80211_MAX_QUEUES) - 1, BIT 157 include/net/mac80211.h IEEE80211_CHANCTX_CHANGE_WIDTH = BIT(0), BIT 158 include/net/mac80211.h IEEE80211_CHANCTX_CHANGE_RX_CHAINS = BIT(1), BIT 159 include/net/mac80211.h IEEE80211_CHANCTX_CHANGE_RADAR = BIT(2), BIT 160 include/net/mac80211.h IEEE80211_CHANCTX_CHANGE_CHANNEL = BIT(3), BIT 161 include/net/mac80211.h IEEE80211_CHANCTX_CHANGE_MIN_WIDTH = BIT(4), BIT 513 include/net/mac80211.h IEEE80211_TX_CTL_REQ_TX_STATUS = BIT(0), BIT 514 include/net/mac80211.h IEEE80211_TX_CTL_ASSIGN_SEQ = BIT(1), BIT 515 include/net/mac80211.h IEEE80211_TX_CTL_NO_ACK = BIT(2), BIT 516 include/net/mac80211.h IEEE80211_TX_CTL_CLEAR_PS_FILT = BIT(3), BIT 517 include/net/mac80211.h IEEE80211_TX_CTL_FIRST_FRAGMENT = BIT(4), BIT 518 include/net/mac80211.h IEEE80211_TX_CTL_SEND_AFTER_DTIM = BIT(5), BIT 519 include/net/mac80211.h IEEE80211_TX_CTL_AMPDU = BIT(6), BIT 520 include/net/mac80211.h IEEE80211_TX_CTL_INJECTED = BIT(7), BIT 521 include/net/mac80211.h IEEE80211_TX_STAT_TX_FILTERED = BIT(8), BIT 522 include/net/mac80211.h IEEE80211_TX_STAT_ACK = BIT(9), BIT 523 include/net/mac80211.h IEEE80211_TX_STAT_AMPDU = BIT(10), BIT 524 include/net/mac80211.h IEEE80211_TX_STAT_AMPDU_NO_BACK = BIT(11), BIT 525 include/net/mac80211.h IEEE80211_TX_CTL_RATE_CTRL_PROBE = BIT(12), BIT 526 include/net/mac80211.h IEEE80211_TX_INTFL_OFFCHAN_TX_OK = BIT(13), BIT 527 include/net/mac80211.h IEEE80211_TX_INTFL_NEED_TXPROCESSING = BIT(14), BIT 528 include/net/mac80211.h IEEE80211_TX_INTFL_RETRIED = BIT(15), BIT 529 include/net/mac80211.h IEEE80211_TX_INTFL_DONT_ENCRYPT = BIT(16), BIT 530 include/net/mac80211.h IEEE80211_TX_CTL_NO_PS_BUFFER = BIT(17), BIT 531 include/net/mac80211.h IEEE80211_TX_CTL_MORE_FRAMES = BIT(18), BIT 532 include/net/mac80211.h IEEE80211_TX_INTFL_RETRANSMISSION = BIT(19), BIT 533 include/net/mac80211.h IEEE80211_TX_INTFL_MLME_CONN_TX = BIT(20), BIT 534 include/net/mac80211.h IEEE80211_TX_INTFL_NL80211_FRAME_TX = BIT(21), BIT 535 include/net/mac80211.h IEEE80211_TX_CTL_LDPC = BIT(22), BIT 536 include/net/mac80211.h IEEE80211_TX_CTL_STBC = BIT(23) | BIT(24), BIT 537 include/net/mac80211.h IEEE80211_TX_CTL_TX_OFFCHAN = BIT(25), BIT 538 include/net/mac80211.h IEEE80211_TX_INTFL_TKIP_MIC_FAILURE = BIT(26), BIT 539 include/net/mac80211.h IEEE80211_TX_CTL_NO_CCK_RATE = BIT(27), BIT 540 include/net/mac80211.h IEEE80211_TX_STATUS_EOSP = BIT(28), BIT 541 include/net/mac80211.h IEEE80211_TX_CTL_USE_MINRATE = BIT(29), BIT 542 include/net/mac80211.h IEEE80211_TX_CTL_DONTFRAG = BIT(30), BIT 543 include/net/mac80211.h IEEE80211_TX_CTL_PS_RESPONSE = BIT(31), BIT 557 include/net/mac80211.h IEEE80211_TX_CTRL_PORT_CTRL_PROTO = BIT(0), BIT 599 include/net/mac80211.h IEEE80211_TX_RC_USE_RTS_CTS = BIT(0), BIT 600 include/net/mac80211.h IEEE80211_TX_RC_USE_CTS_PROTECT = BIT(1), BIT 601 include/net/mac80211.h IEEE80211_TX_RC_USE_SHORT_PREAMBLE = BIT(2), BIT 604 include/net/mac80211.h IEEE80211_TX_RC_MCS = BIT(3), BIT 605 include/net/mac80211.h IEEE80211_TX_RC_GREEN_FIELD = BIT(4), BIT 606 include/net/mac80211.h IEEE80211_TX_RC_40_MHZ_WIDTH = BIT(5), BIT 607 include/net/mac80211.h IEEE80211_TX_RC_DUP_DATA = BIT(6), BIT 608 include/net/mac80211.h IEEE80211_TX_RC_SHORT_GI = BIT(7), BIT 609 include/net/mac80211.h IEEE80211_TX_RC_VHT_MCS = BIT(8), BIT 610 include/net/mac80211.h IEEE80211_TX_RC_80_MHZ_WIDTH = BIT(9), BIT 611 include/net/mac80211.h IEEE80211_TX_RC_160_MHZ_WIDTH = BIT(10), BIT 884 include/net/mac80211.h RX_FLAG_MMIC_ERROR = BIT(0), BIT 885 include/net/mac80211.h RX_FLAG_DECRYPTED = BIT(1), BIT 886 include/net/mac80211.h RX_FLAG_MMIC_STRIPPED = BIT(3), BIT 887 include/net/mac80211.h RX_FLAG_IV_STRIPPED = BIT(4), BIT 888 include/net/mac80211.h RX_FLAG_FAILED_FCS_CRC = BIT(5), BIT 889 include/net/mac80211.h RX_FLAG_FAILED_PLCP_CRC = BIT(6), BIT 890 include/net/mac80211.h RX_FLAG_MACTIME_START = BIT(7), BIT 891 include/net/mac80211.h RX_FLAG_SHORTPRE = BIT(8), BIT 892 include/net/mac80211.h RX_FLAG_HT = BIT(9), BIT 893 include/net/mac80211.h RX_FLAG_40MHZ = BIT(10), BIT 894 include/net/mac80211.h RX_FLAG_SHORT_GI = BIT(11), BIT 895 include/net/mac80211.h RX_FLAG_NO_SIGNAL_VAL = BIT(12), BIT 896 include/net/mac80211.h RX_FLAG_HT_GF = BIT(13), BIT 897 include/net/mac80211.h RX_FLAG_AMPDU_DETAILS = BIT(14), BIT 898 include/net/mac80211.h RX_FLAG_AMPDU_REPORT_ZEROLEN = BIT(15), BIT 899 include/net/mac80211.h RX_FLAG_AMPDU_IS_ZEROLEN = BIT(16), BIT 900 include/net/mac80211.h RX_FLAG_AMPDU_LAST_KNOWN = BIT(17), BIT 901 include/net/mac80211.h RX_FLAG_AMPDU_IS_LAST = BIT(18), BIT 902 include/net/mac80211.h RX_FLAG_AMPDU_DELIM_CRC_ERROR = BIT(19), BIT 903 include/net/mac80211.h RX_FLAG_AMPDU_DELIM_CRC_KNOWN = BIT(20), BIT 904 include/net/mac80211.h RX_FLAG_MACTIME_END = BIT(21), BIT 905 include/net/mac80211.h RX_FLAG_VHT = BIT(22), BIT 906 include/net/mac80211.h RX_FLAG_LDPC = BIT(23), BIT 907 include/net/mac80211.h RX_FLAG_STBC_MASK = BIT(26) | BIT(27), BIT 908 include/net/mac80211.h RX_FLAG_10MHZ = BIT(28), BIT 909 include/net/mac80211.h RX_FLAG_5MHZ = BIT(29), BIT 910 include/net/mac80211.h RX_FLAG_AMSDU_MORE = BIT(30), BIT 926 include/net/mac80211.h RX_VHT_FLAG_80MHZ = BIT(0), BIT 927 include/net/mac80211.h RX_VHT_FLAG_80P80MHZ = BIT(1), BIT 928 include/net/mac80211.h RX_VHT_FLAG_160MHZ = BIT(2), BIT 929 include/net/mac80211.h RX_VHT_FLAG_BF = BIT(3), BIT 1027 include/net/mac80211.h IEEE80211_CONF_CHANGE_SMPS = BIT(1), BIT 1028 include/net/mac80211.h IEEE80211_CONF_CHANGE_LISTEN_INTERVAL = BIT(2), BIT 1029 include/net/mac80211.h IEEE80211_CONF_CHANGE_MONITOR = BIT(3), BIT 1030 include/net/mac80211.h IEEE80211_CONF_CHANGE_PS = BIT(4), BIT 1031 include/net/mac80211.h IEEE80211_CONF_CHANGE_POWER = BIT(5), BIT 1032 include/net/mac80211.h IEEE80211_CONF_CHANGE_CHANNEL = BIT(6), BIT 1033 include/net/mac80211.h IEEE80211_CONF_CHANGE_RETRY_LIMITS = BIT(7), BIT 1034 include/net/mac80211.h IEEE80211_CONF_CHANGE_IDLE = BIT(8), BIT 1143 include/net/mac80211.h IEEE80211_VIF_BEACON_FILTER = BIT(0), BIT 1144 include/net/mac80211.h IEEE80211_VIF_SUPPORTS_CQM_RSSI = BIT(1), BIT 1255 include/net/mac80211.h IEEE80211_KEY_FLAG_GENERATE_IV_MGMT = BIT(0), BIT 1256 include/net/mac80211.h IEEE80211_KEY_FLAG_GENERATE_IV = BIT(1), BIT 1257 include/net/mac80211.h IEEE80211_KEY_FLAG_GENERATE_MMIC = BIT(2), BIT 1258 include/net/mac80211.h IEEE80211_KEY_FLAG_PAIRWISE = BIT(3), BIT 1259 include/net/mac80211.h IEEE80211_KEY_FLAG_SW_MGMT_TX = BIT(4), BIT 1260 include/net/mac80211.h IEEE80211_KEY_FLAG_PUT_IV_SPACE = BIT(5), BIT 1261 include/net/mac80211.h IEEE80211_KEY_FLAG_RX_MGMT = BIT(6), BIT 2350 include/net/mac80211.h IEEE80211_RC_BW_CHANGED = BIT(0), BIT 2351 include/net/mac80211.h IEEE80211_RC_SMPS_CHANGED = BIT(1), BIT 2352 include/net/mac80211.h IEEE80211_RC_SUPP_RATES_CHANGED = BIT(2), BIT 2353 include/net/mac80211.h IEEE80211_RC_NSS_CHANGED = BIT(3), BIT 3090 include/net/mac80211.h IEEE80211_TPT_LEDTRIG_FL_RADIO = BIT(0), BIT 3091 include/net/mac80211.h IEEE80211_TPT_LEDTRIG_FL_WORK = BIT(1), BIT 3092 include/net/mac80211.h IEEE80211_TPT_LEDTRIG_FL_CONNECTED = BIT(2), BIT 4107 include/net/mac80211.h IEEE80211_IFACE_ITER_RESUME_ALL = BIT(0), BIT 4654 include/net/mac80211.h return (sta == NULL || sta->supp_rates[band] & BIT(index)); BIT 141 include/net/regulatory.h REGULATORY_CUSTOM_REG = BIT(0), BIT 142 include/net/regulatory.h REGULATORY_STRICT_REG = BIT(1), BIT 143 include/net/regulatory.h REGULATORY_DISABLE_BEACON_HINTS = BIT(2), BIT 144 include/net/regulatory.h REGULATORY_COUNTRY_IE_FOLLOW_POWER = BIT(3), BIT 145 include/net/regulatory.h REGULATORY_COUNTRY_IE_IGNORE = BIT(4), BIT 146 include/net/regulatory.h REGULATORY_ENABLE_RELAX_NO_IR = BIT(5), BIT 525 include/scsi/osd_protocol.h OSD_SEC_CAP_APPEND = BIT(0), BIT 526 include/scsi/osd_protocol.h OSD_SEC_CAP_OBJ_MGMT = BIT(1), BIT 527 include/scsi/osd_protocol.h OSD_SEC_CAP_REMOVE = BIT(2), BIT 528 include/scsi/osd_protocol.h OSD_SEC_CAP_CREATE = BIT(3), BIT 529 include/scsi/osd_protocol.h OSD_SEC_CAP_SET_ATTR = BIT(4), BIT 530 include/scsi/osd_protocol.h OSD_SEC_CAP_GET_ATTR = BIT(5), BIT 531 include/scsi/osd_protocol.h OSD_SEC_CAP_WRITE = BIT(6), BIT 532 include/scsi/osd_protocol.h OSD_SEC_CAP_READ = BIT(7), BIT 534 include/scsi/osd_protocol.h OSD_SEC_CAP_NONE1 = BIT(8), BIT 535 include/scsi/osd_protocol.h OSD_SEC_CAP_NONE2 = BIT(9), BIT 536 include/scsi/osd_protocol.h OSD_SEC_GBL_REM = BIT(10), /*v2 only*/ BIT 537 include/scsi/osd_protocol.h OSD_SEC_CAP_QUERY = BIT(11), /*v2 only*/ BIT 538 include/scsi/osd_protocol.h OSD_SEC_CAP_M_OBJECT = BIT(12), /*v2 only*/ BIT 539 include/scsi/osd_protocol.h OSD_SEC_CAP_POL_SEC = BIT(13), BIT 540 include/scsi/osd_protocol.h OSD_SEC_CAP_GLOBAL = BIT(14), BIT 541 include/scsi/osd_protocol.h OSD_SEC_CAP_DEV_MGMT = BIT(15), BIT 209 include/scsi/osd_sense.h OSD_CFB_COMMAND = BIT(4), BIT 210 include/scsi/osd_sense.h OSD_CFB_CMD_CAP_VERIFIED = BIT(5), BIT 211 include/scsi/osd_sense.h OSD_CFB_VALIDATION = BIT(7), BIT 212 include/scsi/osd_sense.h OSD_CFB_IMP_ST_ATT = BIT(12), BIT 213 include/scsi/osd_sense.h OSD_CFB_SET_ATT = BIT(20), BIT 214 include/scsi/osd_sense.h OSD_CFB_SA_CAP_VERIFIED = BIT(21), BIT 215 include/scsi/osd_sense.h OSD_CFB_GET_ATT = BIT(28), BIT 216 include/scsi/osd_sense.h OSD_CFB_GA_CAP_VERIFIED = BIT(29), BIT 87 include/sound/dmaengine_pcm.h #define SND_DMAENGINE_PCM_FLAG_COMPAT BIT(0) BIT 92 include/sound/dmaengine_pcm.h #define SND_DMAENGINE_PCM_FLAG_NO_DT BIT(1) BIT 97 include/sound/dmaengine_pcm.h #define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(2) BIT 102 include/sound/dmaengine_pcm.h #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3) BIT 106 include/sound/dmaengine_pcm.h #define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4) BIT 16 include/video/display_timing.h DISPLAY_FLAGS_HSYNC_LOW = BIT(0), BIT 17 include/video/display_timing.h DISPLAY_FLAGS_HSYNC_HIGH = BIT(1), BIT 18 include/video/display_timing.h DISPLAY_FLAGS_VSYNC_LOW = BIT(2), BIT 19 include/video/display_timing.h DISPLAY_FLAGS_VSYNC_HIGH = BIT(3), BIT 22 include/video/display_timing.h DISPLAY_FLAGS_DE_LOW = BIT(4), BIT 23 include/video/display_timing.h DISPLAY_FLAGS_DE_HIGH = BIT(5), BIT 25 include/video/display_timing.h DISPLAY_FLAGS_PIXDATA_POSEDGE = BIT(6), BIT 27 include/video/display_timing.h DISPLAY_FLAGS_PIXDATA_NEGEDGE = BIT(7), BIT 28 include/video/display_timing.h DISPLAY_FLAGS_INTERLACED = BIT(8), BIT 29 include/video/display_timing.h DISPLAY_FLAGS_DOUBLESCAN = BIT(9), BIT 30 include/video/display_timing.h DISPLAY_FLAGS_DOUBLECLK = BIT(10), BIT 81 include/video/sstfb.h # define PCI_EN_INIT_WR BIT(0) BIT 82 include/video/sstfb.h # define PCI_EN_FIFO_WR BIT(1) BIT 83 include/video/sstfb.h # define PCI_REMAP_DAC BIT(2) BIT 89 include/video/sstfb.h # define STATUS_FBI_BUSY BIT(7) BIT 91 include/video/sstfb.h # define EN_CLIPPING BIT(0) /* enable clipping */ BIT 92 include/video/sstfb.h # define EN_RGB_WRITE BIT(9) /* enable writes to rgb area */ BIT 93 include/video/sstfb.h # define EN_ALPHA_WRITE BIT(10) BIT 94 include/video/sstfb.h # define ENGINE_INVERT_Y BIT(17) /* invert Y origin (pipe) */ BIT 103 include/video/sstfb.h # define EN_PXL_PIPELINE BIT(8) /* pixel pipeline (clip..)*/ BIT 104 include/video/sstfb.h # define LFB_WORD_SWIZZLE_WR BIT(11) /* enable write-wordswap (big-endian) */ BIT 105 include/video/sstfb.h # define LFB_BYTE_SWIZZLE_WR BIT(12) /* enable write-byteswap (big-endian) */ BIT 106 include/video/sstfb.h # define LFB_INVERT_Y BIT(13) /* invert Y origin (LFB) */ BIT 107 include/video/sstfb.h # define LFB_WORD_SWIZZLE_RD BIT(15) /* enable read-wordswap (big-endian) */ BIT 108 include/video/sstfb.h # define LFB_BYTE_SWIZZLE_RD BIT(16) /* enable read-byteswap (big-endian) */ BIT 116 include/video/sstfb.h # define SLOW_PCI_READS BIT(0) /* 2 ws */ BIT 117 include/video/sstfb.h # define LFB_READ_AHEAD BIT(1) BIT 121 include/video/sstfb.h # define DIS_VGA_PASSTHROUGH BIT(0) BIT 122 include/video/sstfb.h # define FBI_RESET BIT(1) BIT 123 include/video/sstfb.h # define FIFO_RESET BIT(2) BIT 127 include/video/sstfb.h # define SLOW_PCI_WRITES BIT(1) /* 1 ws */ BIT 128 include/video/sstfb.h # define EN_LFB_READ BIT(3) BIT 130 include/video/sstfb.h # define VIDEO_RESET BIT(8) BIT 131 include/video/sstfb.h # define EN_BLANKING BIT(12) BIT 132 include/video/sstfb.h # define EN_DATA_OE BIT(13) BIT 133 include/video/sstfb.h # define EN_BLANK_OE BIT(14) BIT 134 include/video/sstfb.h # define EN_HVSYNC_OE BIT(15) BIT 135 include/video/sstfb.h # define EN_DCLK_OE BIT(16) BIT 137 include/video/sstfb.h # define SEL_INPUT_VCLK_SLAVE BIT(17) BIT 141 include/video/sstfb.h # define EN_24BPP BIT(22) BIT 146 include/video/sstfb.h # define EN_FAST_RAS_READ BIT(5) BIT 147 include/video/sstfb.h # define EN_DRAM_OE BIT(6) BIT 148 include/video/sstfb.h # define EN_FAST_RD_AHEAD_WR BIT(7) BIT 153 include/video/sstfb.h # define EN_RD_AHEAD_FIFO BIT(21) BIT 154 include/video/sstfb.h # define EN_DRAM_REFRESH BIT(22) BIT 158 include/video/sstfb.h # define DISABLE_TEXTURE BIT(6) BIT 163 include/video/sstfb.h # define DAC_READ_CMD BIT(11) /* set read dacreg mode */ BIT 166 include/video/sstfb.h # define HDOUBLESCAN BIT(20) BIT 167 include/video/sstfb.h # define VDOUBLESCAN BIT(21) BIT 168 include/video/sstfb.h # define HSYNC_HIGH BIT(23) BIT 169 include/video/sstfb.h # define VSYNC_HIGH BIT(24) BIT 170 include/video/sstfb.h # define INTERLACE BIT(26) BIT 196 include/video/sstfb.h # define LAUNCH_BITBLT BIT(31) /* Launch BitBLT in BltCommand, bltDstXY or bltSize */ BIT 208 include/video/sstfb.h # define DACREG_CR0_EN_INDEXED BIT(0) /* enable indexec mode */ BIT 209 include/video/sstfb.h # define DACREG_CR0_8BIT BIT(1) /* set dac to 8 bits/read */ BIT 210 include/video/sstfb.h # define DACREG_CR0_PWDOWN BIT(3) /* powerdown dac */ BIT 215 include/video/sstfb.h # define DACREG_CC_CLKA BIT(7) /* clk A controlled by regs */ BIT 217 include/video/sstfb.h # define DACREG_CC_CLKB BIT(3) /* clk B controlled by regs */ BIT 235 include/video/sstfb.h # define DACREG_ICS_CMD_PWDOWN BIT(0) /* powerdown dac */ BIT 248 include/video/sstfb.h # define DACREG_ICS_CLK0 BIT(5) BIT 90 include/video/tdfx.h #define AUTOINC_DSTX BIT(10) BIT 91 include/video/tdfx.h #define AUTOINC_DSTY BIT(11) BIT 97 include/video/tdfx.h #define STATUS_RETRACE BIT(6) BIT 98 include/video/tdfx.h #define STATUS_BUSY BIT(9) BIT 99 include/video/tdfx.h #define MISCINIT1_CLUT_INV BIT(0) BIT 100 include/video/tdfx.h #define MISCINIT1_2DBLOCK_DIS BIT(15) BIT 101 include/video/tdfx.h #define DRAMINIT0_SGRAM_NUM BIT(26) BIT 102 include/video/tdfx.h #define DRAMINIT0_SGRAM_TYPE BIT(27) BIT 103 include/video/tdfx.h #define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29)) BIT 105 include/video/tdfx.h #define DRAMINIT1_MEM_SDRAM BIT(30) BIT 106 include/video/tdfx.h #define VGAINIT0_VGA_DISABLE BIT(0) BIT 107 include/video/tdfx.h #define VGAINIT0_EXT_TIMING BIT(1) BIT 108 include/video/tdfx.h #define VGAINIT0_8BIT_DAC BIT(2) BIT 109 include/video/tdfx.h #define VGAINIT0_EXT_ENABLE BIT(6) BIT 110 include/video/tdfx.h #define VGAINIT0_WAKEUP_3C3 BIT(8) BIT 111 include/video/tdfx.h #define VGAINIT0_LEGACY_DISABLE BIT(9) BIT 112 include/video/tdfx.h #define VGAINIT0_ALT_READBACK BIT(10) BIT 113 include/video/tdfx.h #define VGAINIT0_FAST_BLINK BIT(11) BIT 114 include/video/tdfx.h #define VGAINIT0_EXTSHIFTOUT BIT(12) BIT 115 include/video/tdfx.h #define VGAINIT0_DECODE_3C6 BIT(13) BIT 116 include/video/tdfx.h #define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) BIT 118 include/video/tdfx.h #define VIDCFG_VIDPROC_ENABLE BIT(0) BIT 119 include/video/tdfx.h #define VIDCFG_CURS_X11 BIT(1) BIT 120 include/video/tdfx.h #define VIDCFG_INTERLACE BIT(3) BIT 121 include/video/tdfx.h #define VIDCFG_HALF_MODE BIT(4) BIT 122 include/video/tdfx.h #define VIDCFG_DESK_ENABLE BIT(7) BIT 123 include/video/tdfx.h #define VIDCFG_CLUT_BYPASS BIT(10) BIT 124 include/video/tdfx.h #define VIDCFG_2X BIT(26) BIT 125 include/video/tdfx.h #define VIDCFG_HWCURSOR_ENABLE BIT(27) BIT 127 include/video/tdfx.h #define DACMODE_2X BIT(0) BIT 216 scripts/asn1_compiler.c _(BIT),