This source file includes following definitions.
- i2o_ptr_low
- i2o_ptr_high
- i2o_dma_low
- i2o_dma_high
- i2o_cntxt_list_add
- i2o_cntxt_list_get
- i2o_cntxt_list_remove
- i2o_cntxt_list_get_ptr
- i2o_ptr_low
- i2o_ptr_high
- i2o_dma_low
- i2o_dma_high
- i2o_driver_notify_controller_add
- i2o_driver_notify_controller_remove
- i2o_driver_notify_device_add
- i2o_driver_notify_device_remove
- i2o_msg_out_to_virt
- i2o_msg_in_to_virt
- i2o_msg_get
- i2o_msg_post
- i2o_msg_post_wait
- i2o_msg_nop_mfa
- i2o_msg_nop
- i2o_flush_reply
#ifndef _I2O_H
#define _I2O_H
#include <linux/i2o-dev.h>
#define I2O_MAX_DRIVERS 8
#include <linux/pci.h>
#include <linux/bug.h>
#include <linux/dma-mapping.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <linux/mempool.h>
#include <linux/mutex.h>
#include <linux/scatterlist.h>
#include <linux/semaphore.h>
#include <asm/io.h>
#define I2O_QUEUE_EMPTY 0xffffffff
#define CACHE_NULL 0
#define CACHE_PREFETCH 1
#define CACHE_SMARTFETCH 2
#define CACHE_WRITETHROUGH 17
#define CACHE_WRITEBACK 18
#define CACHE_SMARTBACK 19
#define CACHE_SMARTTHROUGH 20
#define BLKI2OGRSTRAT _IOR('2', 1, int)
#define BLKI2OGWSTRAT _IOR('2', 2, int)
#define BLKI2OSRSTRAT _IOW('2', 3, int)
#define BLKI2OSWSTRAT _IOW('2', 4, int)
#define I2O_CMD_ADAPTER_ASSIGN 0xB3
#define I2O_CMD_ADAPTER_READ 0xB2
#define I2O_CMD_ADAPTER_RELEASE 0xB5
#define I2O_CMD_BIOS_INFO_SET 0xA5
#define I2O_CMD_BOOT_DEVICE_SET 0xA7
#define I2O_CMD_CONFIG_VALIDATE 0xBB
#define I2O_CMD_CONN_SETUP 0xCA
#define I2O_CMD_DDM_DESTROY 0xB1
#define I2O_CMD_DDM_ENABLE 0xD5
#define I2O_CMD_DDM_QUIESCE 0xC7
#define I2O_CMD_DDM_RESET 0xD9
#define I2O_CMD_DDM_SUSPEND 0xAF
#define I2O_CMD_DEVICE_ASSIGN 0xB7
#define I2O_CMD_DEVICE_RELEASE 0xB9
#define I2O_CMD_HRT_GET 0xA8
#define I2O_CMD_ADAPTER_CLEAR 0xBE
#define I2O_CMD_ADAPTER_CONNECT 0xC9
#define I2O_CMD_ADAPTER_RESET 0xBD
#define I2O_CMD_LCT_NOTIFY 0xA2
#define I2O_CMD_OUTBOUND_INIT 0xA1
#define I2O_CMD_PATH_ENABLE 0xD3
#define I2O_CMD_PATH_QUIESCE 0xC5
#define I2O_CMD_PATH_RESET 0xD7
#define I2O_CMD_STATIC_MF_CREATE 0xDD
#define I2O_CMD_STATIC_MF_RELEASE 0xDF
#define I2O_CMD_STATUS_GET 0xA0
#define I2O_CMD_SW_DOWNLOAD 0xA9
#define I2O_CMD_SW_UPLOAD 0xAB
#define I2O_CMD_SW_REMOVE 0xAD
#define I2O_CMD_SYS_ENABLE 0xD1
#define I2O_CMD_SYS_MODIFY 0xC1
#define I2O_CMD_SYS_QUIESCE 0xC3
#define I2O_CMD_SYS_TAB_SET 0xA3
#define I2O_CMD_UTIL_NOP 0x00
#define I2O_CMD_UTIL_ABORT 0x01
#define I2O_CMD_UTIL_CLAIM 0x09
#define I2O_CMD_UTIL_RELEASE 0x0B
#define I2O_CMD_UTIL_PARAMS_GET 0x06
#define I2O_CMD_UTIL_PARAMS_SET 0x05
#define I2O_CMD_UTIL_EVT_REGISTER 0x13
#define I2O_CMD_UTIL_EVT_ACK 0x14
#define I2O_CMD_UTIL_CONFIG_DIALOG 0x10
#define I2O_CMD_UTIL_DEVICE_RESERVE 0x0D
#define I2O_CMD_UTIL_DEVICE_RELEASE 0x0F
#define I2O_CMD_UTIL_LOCK 0x17
#define I2O_CMD_UTIL_LOCK_RELEASE 0x19
#define I2O_CMD_UTIL_REPLY_FAULT_NOTIFY 0x15
#define I2O_CMD_SCSI_EXEC 0x81
#define I2O_CMD_SCSI_ABORT 0x83
#define I2O_CMD_SCSI_BUSRESET 0x27
#define I2O_CMD_BUS_ADAPTER_RESET 0x85
#define I2O_CMD_BUS_RESET 0x87
#define I2O_CMD_BUS_SCAN 0x89
#define I2O_CMD_BUS_QUIESCE 0x8b
#define I2O_CMD_BLOCK_READ 0x30
#define I2O_CMD_BLOCK_WRITE 0x31
#define I2O_CMD_BLOCK_CFLUSH 0x37
#define I2O_CMD_BLOCK_MLOCK 0x49
#define I2O_CMD_BLOCK_MUNLOCK 0x4B
#define I2O_CMD_BLOCK_MMOUNT 0x41
#define I2O_CMD_BLOCK_MEJECT 0x43
#define I2O_CMD_BLOCK_POWER 0x70
#define I2O_CMD_PRIVATE 0xFF
#define I2O_CMD_IN_PROGRESS 0x01
#define I2O_CMD_REJECTED 0x02
#define I2O_CMD_FAILED 0x03
#define I2O_CMD_COMPLETED 0x04
#define I2O_RTN_NO_ERROR 0
#define I2O_RTN_NOT_INIT 1
#define I2O_RTN_FREE_Q_EMPTY 2
#define I2O_RTN_TCB_ERROR 3
#define I2O_RTN_TRANSACTION_ERROR 4
#define I2O_RTN_ADAPTER_ALREADY_INIT 5
#define I2O_RTN_MALLOC_ERROR 6
#define I2O_RTN_ADPTR_NOT_REGISTERED 7
#define I2O_RTN_MSG_REPLY_TIMEOUT 8
#define I2O_RTN_NO_STATUS 9
#define I2O_RTN_NO_FIRM_VER 10
#define I2O_RTN_NO_LINK_SPEED 11
#define I2O_REPLY_STATUS_SUCCESS 0x00
#define I2O_REPLY_STATUS_ABORT_DIRTY 0x01
#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02
#define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03
#define I2O_REPLY_STATUS_ERROR_DIRTY 0x04
#define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05
#define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06
#define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08
#define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09
#define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A
#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0B
#define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80
#define I2O_PARAMS_STATUS_SUCCESS 0x00
#define I2O_PARAMS_STATUS_BAD_KEY_ABORT 0x01
#define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE 0x02
#define I2O_PARAMS_STATUS_BUFFER_FULL 0x03
#define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL 0x04
#define I2O_PARAMS_STATUS_FIELD_UNREADABLE 0x05
#define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE 0x06
#define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS 0x07
#define I2O_PARAMS_STATUS_INVALID_GROUP_ID 0x08
#define I2O_PARAMS_STATUS_INVALID_OPERATION 0x09
#define I2O_PARAMS_STATUS_NO_KEY_FIELD 0x0A
#define I2O_PARAMS_STATUS_NO_SUCH_FIELD 0x0B
#define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP 0x0C
#define I2O_PARAMS_STATUS_OPERATION_ERROR 0x0D
#define I2O_PARAMS_STATUS_SCALAR_ERROR 0x0E
#define I2O_PARAMS_STATUS_TABLE_ERROR 0x0F
#define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE 0x10
#define I2O_DSC_SUCCESS 0x0000
#define I2O_DSC_BAD_KEY 0x0002
#define I2O_DSC_TCL_ERROR 0x0003
#define I2O_DSC_REPLY_BUFFER_FULL 0x0004
#define I2O_DSC_NO_SUCH_PAGE 0x0005
#define I2O_DSC_INSUFFICIENT_RESOURCE_SOFT 0x0006
#define I2O_DSC_INSUFFICIENT_RESOURCE_HARD 0x0007
#define I2O_DSC_CHAIN_BUFFER_TOO_LARGE 0x0009
#define I2O_DSC_UNSUPPORTED_FUNCTION 0x000A
#define I2O_DSC_DEVICE_LOCKED 0x000B
#define I2O_DSC_DEVICE_RESET 0x000C
#define I2O_DSC_INAPPROPRIATE_FUNCTION 0x000D
#define I2O_DSC_INVALID_INITIATOR_ADDRESS 0x000E
#define I2O_DSC_INVALID_MESSAGE_FLAGS 0x000F
#define I2O_DSC_INVALID_OFFSET 0x0010
#define I2O_DSC_INVALID_PARAMETER 0x0011
#define I2O_DSC_INVALID_REQUEST 0x0012
#define I2O_DSC_INVALID_TARGET_ADDRESS 0x0013
#define I2O_DSC_MESSAGE_TOO_LARGE 0x0014
#define I2O_DSC_MESSAGE_TOO_SMALL 0x0015
#define I2O_DSC_MISSING_PARAMETER 0x0016
#define I2O_DSC_TIMEOUT 0x0017
#define I2O_DSC_UNKNOWN_ERROR 0x0018
#define I2O_DSC_UNKNOWN_FUNCTION 0x0019
#define I2O_DSC_UNSUPPORTED_VERSION 0x001A
#define I2O_DSC_DEVICE_BUSY 0x001B
#define I2O_DSC_DEVICE_NOT_AVAILABLE 0x001C
#define I2O_BSA_DSC_SUCCESS 0x0000
#define I2O_BSA_DSC_MEDIA_ERROR 0x0001
#define I2O_BSA_DSC_ACCESS_ERROR 0x0002
#define I2O_BSA_DSC_DEVICE_FAILURE 0x0003
#define I2O_BSA_DSC_DEVICE_NOT_READY 0x0004
#define I2O_BSA_DSC_MEDIA_NOT_PRESENT 0x0005
#define I2O_BSA_DSC_MEDIA_LOCKED 0x0006
#define I2O_BSA_DSC_MEDIA_FAILURE 0x0007
#define I2O_BSA_DSC_PROTOCOL_FAILURE 0x0008
#define I2O_BSA_DSC_BUS_FAILURE 0x0009
#define I2O_BSA_DSC_ACCESS_VIOLATION 0x000A
#define I2O_BSA_DSC_WRITE_PROTECTED 0x000B
#define I2O_BSA_DSC_DEVICE_RESET 0x000C
#define I2O_BSA_DSC_VOLUME_CHANGED 0x000D
#define I2O_BSA_DSC_TIMEOUT 0x000E
#define I2O_FSC_TRANSPORT_SERVICE_SUSPENDED 0x81
#define I2O_FSC_TRANSPORT_SERVICE_TERMINATED 0x82
#define I2O_FSC_TRANSPORT_CONGESTION 0x83
#define I2O_FSC_TRANSPORT_FAILURE 0x84
#define I2O_FSC_TRANSPORT_STATE_ERROR 0x85
#define I2O_FSC_TRANSPORT_TIME_OUT 0x86
#define I2O_FSC_TRANSPORT_ROUTING_FAILURE 0x87
#define I2O_FSC_TRANSPORT_INVALID_VERSION 0x88
#define I2O_FSC_TRANSPORT_INVALID_OFFSET 0x89
#define I2O_FSC_TRANSPORT_INVALID_MSG_FLAGS 0x8A
#define I2O_FSC_TRANSPORT_FRAME_TOO_SMALL 0x8B
#define I2O_FSC_TRANSPORT_FRAME_TOO_LARGE 0x8C
#define I2O_FSC_TRANSPORT_INVALID_TARGET_ID 0x8D
#define I2O_FSC_TRANSPORT_INVALID_INITIATOR_ID 0x8E
#define I2O_FSC_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F
#define I2O_FSC_TRANSPORT_UNKNOWN_FAILURE 0xFF
#define I2O_CLAIM_PRIMARY 0x01000000
#define I2O_CLAIM_MANAGEMENT 0x02000000
#define I2O_CLAIM_AUTHORIZED 0x03000000
#define I2O_CLAIM_SECONDARY 0x04000000
#define I2OVER15 0x0001
#define I2OVER20 0x0002
#define I2OVERSION I2OVER15
#define SGL_OFFSET_0 I2OVERSION
#define SGL_OFFSET_4 (0x0040 | I2OVERSION)
#define SGL_OFFSET_5 (0x0050 | I2OVERSION)
#define SGL_OFFSET_6 (0x0060 | I2OVERSION)
#define SGL_OFFSET_7 (0x0070 | I2OVERSION)
#define SGL_OFFSET_8 (0x0080 | I2OVERSION)
#define SGL_OFFSET_9 (0x0090 | I2OVERSION)
#define SGL_OFFSET_10 (0x00A0 | I2OVERSION)
#define SGL_OFFSET_11 (0x00B0 | I2OVERSION)
#define SGL_OFFSET_12 (0x00C0 | I2OVERSION)
#define SGL_OFFSET(x) (((x)<<4) | I2OVERSION)
#define TRL_SINGLE_FIXED_LENGTH 0x00
#define TRL_SINGLE_VARIABLE_LENGTH 0x40
#define TRL_MULTIPLE_FIXED_LENGTH 0x80
#define MSG_STATIC 0x0100
#define MSG_64BIT_CNTXT 0x0200
#define MSG_MULTI_TRANS 0x1000
#define MSG_FAIL 0x2000
#define MSG_FINAL 0x4000
#define MSG_REPLY 0x8000
#define THREE_WORD_MSG_SIZE 0x00030000
#define FOUR_WORD_MSG_SIZE 0x00040000
#define FIVE_WORD_MSG_SIZE 0x00050000
#define SIX_WORD_MSG_SIZE 0x00060000
#define SEVEN_WORD_MSG_SIZE 0x00070000
#define EIGHT_WORD_MSG_SIZE 0x00080000
#define NINE_WORD_MSG_SIZE 0x00090000
#define TEN_WORD_MSG_SIZE 0x000A0000
#define ELEVEN_WORD_MSG_SIZE 0x000B0000
#define I2O_MESSAGE_SIZE(x) ((x)<<16)
#define ADAPTER_TID 0
#define HOST_TID 1
#define I2O_MAX_OUTBOUND_MSG_FRAMES 128
#define I2O_OUTBOUND_MSG_FRAME_SIZE 128
#define I2O_MSG_INPOOL_MIN 32
#define I2O_INBOUND_MSG_FRAME_SIZE 128
#define I2O_POST_WAIT_OK 0
#define I2O_POST_WAIT_TIMEOUT -ETIMEDOUT
#define I2O_CONTEXT_LIST_MIN_LENGTH 15
#define I2O_CONTEXT_LIST_USED 0x01
#define I2O_CONTEXT_LIST_DELETED 0x02
#define I2O_TIMEOUT_INIT_OUTBOUND_QUEUE 15
#define I2O_TIMEOUT_MESSAGE_GET 5
#define I2O_TIMEOUT_RESET 30
#define I2O_TIMEOUT_STATUS_GET 5
#define I2O_TIMEOUT_LCT_GET 360
#define I2O_TIMEOUT_SCSI_SCB_ABORT 240
#define I2O_HRT_GET_TRIES 3
#define I2O_LCT_GET_TRIES 3
#define I2O_MAX_SECTORS 1024
#define I2O_MAX_SECTORS_LIMITED 128
#define I2O_MAX_PHYS_SEGMENTS BLK_MAX_SEGMENTS
struct i2o_message {
union {
struct {
u8 version_offset;
u8 flags;
u16 size;
u32 target_tid:12;
u32 init_tid:12;
u32 function:8;
u32 icntxt;
u32 tcntxt;
} s;
u32 head[4];
} u;
u32 body[0];
};
struct i2o_msg_mfa {
u32 mfa;
struct i2o_message msg;
};
struct i2o_device {
i2o_lct_entry lct_data;
struct i2o_controller *iop;
struct list_head list;
struct device device;
struct mutex lock;
};
struct i2o_event {
struct work_struct work;
struct i2o_device *i2o_dev;
u16 size;
u32 tcntxt;
u32 event_indicator;
u32 data[0];
};
struct i2o_class_id {
u16 class_id:12;
};
struct i2o_driver {
char *name;
int context;
struct i2o_class_id *classes;
int (*reply) (struct i2o_controller *, u32, struct i2o_message *);
work_func_t event;
struct workqueue_struct *event_queue;
struct device_driver driver;
void (*notify_controller_add) (struct i2o_controller *);
void (*notify_controller_remove) (struct i2o_controller *);
void (*notify_device_add) (struct i2o_device *);
void (*notify_device_remove) (struct i2o_device *);
struct semaphore lock;
};
struct i2o_dma {
void *virt;
dma_addr_t phys;
size_t len;
};
struct i2o_pool {
char *name;
struct kmem_cache *slab;
mempool_t *mempool;
};
struct i2o_io {
void __iomem *virt;
unsigned long phys;
unsigned long len;
};
struct i2o_context_list_element {
struct list_head list;
u32 context;
void *ptr;
unsigned long timestamp;
};
struct i2o_controller {
char name[16];
int unit;
int type;
struct pci_dev *pdev;
unsigned int promise:1;
unsigned int adaptec:1;
unsigned int raptor:1;
unsigned int no_quiesce:1;
unsigned int short_req:1;
unsigned int limit_sectors:1;
unsigned int pae_support:1;
struct list_head devices;
struct list_head list;
void __iomem *in_port;
void __iomem *out_port;
void __iomem *irq_status;
void __iomem *irq_mask;
struct i2o_dma status;
struct i2o_dma hrt;
i2o_lct *lct;
struct i2o_dma dlct;
struct mutex lct_lock;
struct i2o_dma status_block;
struct i2o_io base;
struct i2o_io in_queue;
struct i2o_dma out_queue;
struct i2o_pool in_msg;
unsigned int battery:1;
unsigned int io_alloc:1;
unsigned int mem_alloc:1;
struct resource io_resource;
struct resource mem_resource;
struct device device;
struct i2o_device *exec;
#if BITS_PER_LONG == 64
spinlock_t context_list_lock;
atomic_t context_list_counter;
struct list_head context_list;
#endif
spinlock_t lock;
void *driver_data[I2O_MAX_DRIVERS];
};
struct i2o_sys_tbl_entry {
u16 org_id;
u16 reserved1;
u32 iop_id:12;
u32 reserved2:20;
u16 seg_num:12;
u16 i2o_version:4;
u8 iop_state;
u8 msg_type;
u16 frame_size;
u16 reserved3;
u32 last_changed;
u32 iop_capabilities;
u32 inbound_low;
u32 inbound_high;
};
struct i2o_sys_tbl {
u8 num_entries;
u8 version;
u16 reserved1;
u32 change_ind;
u32 reserved2;
u32 reserved3;
struct i2o_sys_tbl_entry iops[0];
};
extern struct list_head i2o_controllers;
extern struct i2o_message *i2o_msg_get_wait(struct i2o_controller *, int);
extern int i2o_msg_post_wait_mem(struct i2o_controller *, struct i2o_message *,
unsigned long, struct i2o_dma *);
extern int i2o_status_get(struct i2o_controller *);
extern int i2o_event_register(struct i2o_device *, struct i2o_driver *, int,
u32);
extern struct i2o_device *i2o_iop_find_device(struct i2o_controller *, u16);
extern struct i2o_controller *i2o_find_iop(int);
#if BITS_PER_LONG == 64
extern u32 i2o_cntxt_list_add(struct i2o_controller *, void *);
extern void *i2o_cntxt_list_get(struct i2o_controller *, u32);
extern u32 i2o_cntxt_list_remove(struct i2o_controller *, void *);
extern u32 i2o_cntxt_list_get_ptr(struct i2o_controller *, void *);
static inline u32 i2o_ptr_low(void *ptr)
{
return (u32) (u64) ptr;
};
static inline u32 i2o_ptr_high(void *ptr)
{
return (u32) ((u64) ptr >> 32);
};
static inline u32 i2o_dma_low(dma_addr_t dma_addr)
{
return (u32) (u64) dma_addr;
};
static inline u32 i2o_dma_high(dma_addr_t dma_addr)
{
return (u32) ((u64) dma_addr >> 32);
};
#else
static inline u32 i2o_cntxt_list_add(struct i2o_controller *c, void *ptr)
{
return (u32) ptr;
};
static inline void *i2o_cntxt_list_get(struct i2o_controller *c, u32 context)
{
return (void *)context;
};
static inline u32 i2o_cntxt_list_remove(struct i2o_controller *c, void *ptr)
{
return (u32) ptr;
};
static inline u32 i2o_cntxt_list_get_ptr(struct i2o_controller *c, void *ptr)
{
return (u32) ptr;
};
static inline u32 i2o_ptr_low(void *ptr)
{
return (u32) ptr;
};
static inline u32 i2o_ptr_high(void *ptr)
{
return 0;
};
static inline u32 i2o_dma_low(dma_addr_t dma_addr)
{
return (u32) dma_addr;
};
static inline u32 i2o_dma_high(dma_addr_t dma_addr)
{
return 0;
};
#endif
extern u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size);
extern dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
size_t size,
enum dma_data_direction direction,
u32 ** sg_ptr);
extern int i2o_dma_map_sg(struct i2o_controller *c,
struct scatterlist *sg, int sg_count,
enum dma_data_direction direction,
u32 ** sg_ptr);
extern int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len);
extern void i2o_dma_free(struct device *dev, struct i2o_dma *addr);
extern int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
size_t len);
extern int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
size_t size, int min_nr);
extern void i2o_pool_free(struct i2o_pool *pool);
extern int i2o_driver_register(struct i2o_driver *);
extern void i2o_driver_unregister(struct i2o_driver *);
static inline void i2o_driver_notify_controller_add(struct i2o_driver *drv,
struct i2o_controller *c)
{
if (drv->notify_controller_add)
drv->notify_controller_add(c);
};
static inline void i2o_driver_notify_controller_remove(struct i2o_driver *drv,
struct i2o_controller *c)
{
if (drv->notify_controller_remove)
drv->notify_controller_remove(c);
};
static inline void i2o_driver_notify_device_add(struct i2o_driver *drv,
struct i2o_device *i2o_dev)
{
if (drv->notify_device_add)
drv->notify_device_add(i2o_dev);
};
static inline void i2o_driver_notify_device_remove(struct i2o_driver *drv,
struct i2o_device *i2o_dev)
{
if (drv->notify_device_remove)
drv->notify_device_remove(i2o_dev);
};
extern void i2o_driver_notify_controller_add_all(struct i2o_controller *);
extern void i2o_driver_notify_controller_remove_all(struct i2o_controller *);
extern void i2o_driver_notify_device_add_all(struct i2o_device *);
extern void i2o_driver_notify_device_remove_all(struct i2o_device *);
extern int i2o_device_claim(struct i2o_device *);
extern int i2o_device_claim_release(struct i2o_device *);
extern int i2o_exec_lct_get(struct i2o_controller *);
#define to_i2o_driver(drv) container_of(drv,struct i2o_driver, driver)
#define to_i2o_device(dev) container_of(dev, struct i2o_device, device)
#define to_i2o_controller(dev) container_of(dev, struct i2o_controller, device)
static inline struct i2o_message *i2o_msg_out_to_virt(struct i2o_controller *c,
u32 m)
{
BUG_ON(m < c->out_queue.phys
|| m >= c->out_queue.phys + c->out_queue.len);
return c->out_queue.virt + (m - c->out_queue.phys);
};
static inline struct i2o_message __iomem *i2o_msg_in_to_virt(struct
i2o_controller *c,
u32 m)
{
return c->in_queue.virt + m;
};
static inline struct i2o_message *i2o_msg_get(struct i2o_controller *c)
{
struct i2o_msg_mfa *mmsg = mempool_alloc(c->in_msg.mempool, GFP_ATOMIC);
if (!mmsg)
return ERR_PTR(-ENOMEM);
mmsg->mfa = readl(c->in_port);
if (unlikely(mmsg->mfa >= c->in_queue.len)) {
u32 mfa = mmsg->mfa;
mempool_free(mmsg, c->in_msg.mempool);
if (mfa == I2O_QUEUE_EMPTY)
return ERR_PTR(-EBUSY);
return ERR_PTR(-EFAULT);
}
return &mmsg->msg;
};
static inline void i2o_msg_post(struct i2o_controller *c,
struct i2o_message *msg)
{
struct i2o_msg_mfa *mmsg;
mmsg = container_of(msg, struct i2o_msg_mfa, msg);
memcpy_toio(i2o_msg_in_to_virt(c, mmsg->mfa), msg,
(le32_to_cpu(msg->u.head[0]) >> 16) << 2);
writel(mmsg->mfa, c->in_port);
mempool_free(mmsg, c->in_msg.mempool);
};
static inline int i2o_msg_post_wait(struct i2o_controller *c,
struct i2o_message *msg,
unsigned long timeout)
{
return i2o_msg_post_wait_mem(c, msg, timeout, NULL);
};
static inline void i2o_msg_nop_mfa(struct i2o_controller *c, u32 mfa)
{
struct i2o_message __iomem *msg;
u32 nop[3] = {
THREE_WORD_MSG_SIZE | SGL_OFFSET_0,
I2O_CMD_UTIL_NOP << 24 | HOST_TID << 12 | ADAPTER_TID,
0x00000000
};
msg = i2o_msg_in_to_virt(c, mfa);
memcpy_toio(msg, nop, sizeof(nop));
writel(mfa, c->in_port);
};
static inline void i2o_msg_nop(struct i2o_controller *c,
struct i2o_message *msg)
{
struct i2o_msg_mfa *mmsg;
mmsg = container_of(msg, struct i2o_msg_mfa, msg);
i2o_msg_nop_mfa(c, mmsg->mfa);
mempool_free(mmsg, c->in_msg.mempool);
};
static inline void i2o_flush_reply(struct i2o_controller *c, u32 m)
{
writel(m, c->out_port);
};
#define i2o_raw_writel(val, mem) __raw_writel(cpu_to_le32(val), mem)
extern int i2o_parm_field_get(struct i2o_device *, int, int, void *, int);
extern int i2o_parm_table_get(struct i2o_device *, int, int, int, void *, int,
void *, int);
#define osm_printk(level, format, arg...) \
printk(level "%s: " format, OSM_NAME , ## arg)
#ifdef DEBUG
#define osm_debug(format, arg...) \
osm_printk(KERN_DEBUG, format , ## arg)
#else
#define osm_debug(format, arg...) \
do { } while (0)
#endif
#define osm_err(format, arg...) \
osm_printk(KERN_ERR, format , ## arg)
#define osm_info(format, arg...) \
osm_printk(KERN_INFO, format , ## arg)
#define osm_warn(format, arg...) \
osm_printk(KERN_WARNING, format , ## arg)
extern void i2o_report_status(const char *, const char *, struct i2o_message *);
extern void i2o_dump_message(struct i2o_message *);
extern void i2o_dump_hrt(struct i2o_controller *c);
extern void i2o_debug_state(struct i2o_controller *c);
#endif