cycles_t 10 arch/x86/include/asm/iommu.h #define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) cycles_t 22 arch/x86/include/asm/tsc.h static inline cycles_t get_cycles(void) cycles_t 35 arch/x86/include/asm/tsc.h static __always_inline cycles_t vget_cycles(void) cycles_t 45 arch/x86/include/asm/tsc.h return (cycles_t)__native_read_tsc(); cycles_t 615 arch/x86/include/asm/uv/uv_bau.h cycles_t send_message; cycles_t 616 arch/x86/include/asm/uv/uv_bau.h cycles_t period_end; cycles_t 617 arch/x86/include/asm/uv/uv_bau.h cycles_t period_time; cycles_t 631 arch/x86/include/asm/uv/uv_bau.h cycles_t disabled_period; cycles_t 9 include/asm-generic/timex.h static inline cycles_t get_cycles(void) cycles_t 217 include/linux/intel-iommu.h cycles_t start_time = get_cycles(); \